[llvm-commits] [llvm] r57243 - in /llvm/trunk: lib/CodeGen/SelectionDAG/LegalizeDAG.cpp test/CodeGen/Alpha/add128.ll test/CodeGen/Alpha/sub128.ll

[Andrew Lenharth]

This breaks one test in Codegen/Generic on x86 (but not x86-64 or
alpha).  Looking into it now.

Andrew

On Tue, Oct 7, 2008 at 9:15 AM, Andrew Lenharth <alenhar2 at cs.uiuc.edu> wrote:
> Author: alenhar2
> Date: Tue Oct  7 09:15:42 2008
> New Revision: 57243
>
> URL: http://llvm.org/viewvc/llvm-project?rev=57243&view=rev
> Log:
> Expand arith on machines without carry flags
>
> Added:
>    llvm/trunk/test/CodeGen/Alpha/sub128.ll
> Modified:
>    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
>    llvm/trunk/test/CodeGen/Alpha/add128.ll
>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=57243&r1=57242&r2=57243&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Tue Oct  7 09:15:42 2008
> @@ -6431,7 +6431,6 @@
>         break;
>       }
>     }
> -
>     // Expand the subcomponents.
>     SDValue LHSL, LHSH, RHSL, RHSH;
>     ExpandOp(Node->getOperand(0), LHSL, LHSH);
> @@ -6442,16 +6441,41 @@
>     LoOps[1] = RHSL;
>     HiOps[0] = LHSH;
>     HiOps[1] = RHSH;
> -    if (Node->getOpcode() == ISD::ADD) {
> -      Lo = DAG.getNode(ISD::ADDC, VTList, LoOps, 2);
> -      HiOps[2] = Lo.getValue(1);
> -      Hi = DAG.getNode(ISD::ADDE, VTList, HiOps, 3);
> +    if(TLI.isOperationLegal(ISD::ADDC, NVT)) {
> +      if (Node->getOpcode() == ISD::ADD) {
> +        Lo = DAG.getNode(ISD::ADDC, VTList, LoOps, 2);
> +        HiOps[2] = Lo.getValue(1);
> +        Hi = DAG.getNode(ISD::ADDE, VTList, HiOps, 3);
> +      } else {
> +        Lo = DAG.getNode(ISD::SUBC, VTList, LoOps, 2);
> +        HiOps[2] = Lo.getValue(1);
> +        Hi = DAG.getNode(ISD::SUBE, VTList, HiOps, 3);
> +      }
> +      break;
>     } else {
> -      Lo = DAG.getNode(ISD::SUBC, VTList, LoOps, 2);
> -      HiOps[2] = Lo.getValue(1);
> -      Hi = DAG.getNode(ISD::SUBE, VTList, HiOps, 3);
> +      if (Node->getOpcode() == ISD::ADD) {
> +        Lo = DAG.getNode(ISD::ADD, VTList, LoOps, 2);
> +        Hi = DAG.getNode(ISD::ADD, VTList, HiOps, 2);
> +        SDValue Cmp1 = DAG.getSetCC(NVT, Lo, LoOps[0], ISD::SETULT);
> +        SDValue Carry1 = DAG.getNode(ISD::SELECT, NVT, Cmp1,
> +                                     DAG.getConstant(1, NVT),
> +                                     DAG.getConstant(0, NVT));
> +        SDValue Cmp2 = DAG.getSetCC(NVT, Lo, LoOps[1], ISD::SETULT);
> +        SDValue Carry2 = DAG.getNode(ISD::SELECT, NVT, Cmp2,
> +                                    DAG.getConstant(1, NVT),
> +                                    Carry1);
> +        Hi = DAG.getNode(ISD::ADD, NVT, Hi, Carry2);
> +      } else {
> +        Lo = DAG.getNode(ISD::SUB, VTList, LoOps, 2);
> +        Hi = DAG.getNode(ISD::SUB, VTList, HiOps, 2);
> +        SDValue Cmp = DAG.getSetCC(NVT, LoOps[0], LoOps[1], ISD::SETULT);
> +        SDValue Borrow = DAG.getNode(ISD::SELECT, NVT, Cmp,
> +                                     DAG.getConstant(1, NVT),
> +                                     DAG.getConstant(0, NVT));
> +        Hi = DAG.getNode(ISD::SUB, NVT, Hi, Borrow);
> +      }
> +      break;
>     }
> -    break;
>   }
>
>   case ISD::ADDC:
>
> Modified: llvm/trunk/test/CodeGen/Alpha/add128.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Alpha/add128.ll?rev=57243&r1=57242&r2=57243&view=diff
>
> ==============================================================================
> --- llvm/trunk/test/CodeGen/Alpha/add128.ll (original)
> +++ llvm/trunk/test/CodeGen/Alpha/add128.ll Tue Oct  7 09:15:42 2008
> @@ -1,7 +1,6 @@
>  ;test for ADDC and ADDE expansion
>  ;
>  ; RUN: llvm-as < %s | llc -march=alpha
> -; XFAIL: *
>
>  define i128 @add128(i128 %x, i128 %y) {
>  entry:
>
> Added: llvm/trunk/test/CodeGen/Alpha/sub128.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Alpha/sub128.ll?rev=57243&view=auto
>
> ==============================================================================
> --- llvm/trunk/test/CodeGen/Alpha/sub128.ll (added)
> +++ llvm/trunk/test/CodeGen/Alpha/sub128.ll Tue Oct  7 09:15:42 2008
> @@ -0,0 +1,9 @@
> +;test for SUBC and SUBE expansion
> +;
> +; RUN: llvm-as < %s | llc -march=alpha
> +
> +define i128 @sub128(i128 %x, i128 %y) {
> +entry:
> +       %tmp = sub i128 %y, %x
> +       ret i128 %tmp
> +}
>
>
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