[llvm-commits] [llvm] r56825 - in /llvm/trunk/lib/Target/X86: X86FastISel.cpp X86ISelDAGToDAG.cpp X86InstrInfo.cpp X86InstrInfo.h X86MachineFunctionInfo.h
Dan Gohman
gohman at apple.com
Mon Sep 29 17:58:23 PDT 2008
Author: djg
Date: Mon Sep 29 19:58:23 2008
New Revision: 56825
URL: http://llvm.org/viewvc/llvm-project?rev=56825&view=rev
Log:
Move the GlobalBaseReg field out of X86ISelDAGToDAG.cpp
and X86FastISel.cpp into X86MachineFunction.h, so that it
can be shared, instead of having each selector keep track
of its own.
Modified:
llvm/trunk/lib/Target/X86/X86FastISel.cpp
llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
llvm/trunk/lib/Target/X86/X86InstrInfo.h
llvm/trunk/lib/Target/X86/X86MachineFunctionInfo.h
Modified: llvm/trunk/lib/Target/X86/X86FastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FastISel.cpp?rev=56825&r1=56824&r2=56825&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86FastISel.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86FastISel.cpp Mon Sep 29 19:58:23 2008
@@ -40,10 +40,6 @@
///
unsigned StackPtr;
- /// GlobalBaseReg - keeps track of the virtual register mapped onto global
- /// base register.
- unsigned GlobalBaseReg;
-
/// X86ScalarSSEf32, X86ScalarSSEf64 - Select between SSE or x87
/// floating point ops.
/// When SSE is available, use it for f32 operations.
@@ -60,7 +56,6 @@
: FastISel(mf, mmi, vm, bm, am) {
Subtarget = &TM.getSubtarget<X86Subtarget>();
StackPtr = Subtarget->is64Bit() ? X86::RSP : X86::ESP;
- GlobalBaseReg = 0;
X86ScalarSSEf64 = Subtarget->hasSSE2();
X86ScalarSSEf32 = Subtarget->hasSSE1();
}
@@ -103,8 +98,6 @@
CCAssignFn *CCAssignFnForCall(unsigned CC, bool isTailCall = false);
- unsigned getGlobalBaseReg();
-
const X86InstrInfo *getInstrInfo() const {
return getTargetMachine()->getInstrInfo();
}
@@ -152,16 +145,6 @@
return (AllowI1 && VT == MVT::i1) || TLI.isTypeLegal(VT);
}
-/// getGlobalBaseReg - Return the the global base register. Output
-/// instructions required to initialize the global base register, if necessary.
-///
-unsigned X86FastISel::getGlobalBaseReg() {
- assert(!Subtarget->is64Bit() && "X86-64 PIC uses RIP relative addressing");
- if (!GlobalBaseReg)
- GlobalBaseReg = getInstrInfo()->initializeGlobalBaseReg(MBB->getParent());
- return GlobalBaseReg;
-}
-
#include "X86GenCallingConv.inc"
/// CCAssignFnForCall - Selects the correct CCAssignFn for a given calling
@@ -433,7 +416,7 @@
if (!isCall &&
TM.getRelocationModel() == Reloc::PIC_ &&
!Subtarget->is64Bit())
- AM.Base.Reg = getGlobalBaseReg();
+ AM.Base.Reg = getInstrInfo()->getGlobalBaseReg(&MF);
// Emit an extra load if the ABI requires it.
if (Subtarget->GVRequiresExtraLoad(GV, TM, isCall)) {
@@ -1042,7 +1025,7 @@
TM.getRelocationModel() == Reloc::PIC_ &&
Subtarget->isPICStyleGOT()) {
TargetRegisterClass *RC = X86::GR32RegisterClass;
- unsigned Base = getGlobalBaseReg();
+ unsigned Base = getInstrInfo()->getGlobalBaseReg(&MF);
bool Emitted = TII.copyRegToReg(*MBB, MBB->end(), X86::EBX, Base, RC, RC);
assert(Emitted && "Failed to emit a copy instruction!");
}
Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=56825&r1=56824&r2=56825&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Mon Sep 29 19:58:23 2008
@@ -123,10 +123,6 @@
/// make the right decision when generating code for different targets.
const X86Subtarget *Subtarget;
- /// GlobalBaseReg - keeps track of the virtual register mapped onto global
- /// base register.
- unsigned GlobalBaseReg;
-
/// CurBB - Current BB being isel'd.
///
MachineBasicBlock *CurBB;
@@ -143,12 +139,6 @@
Subtarget(&TM.getSubtarget<X86Subtarget>()),
OptForSize(OptimizeForSize) {}
- virtual bool runOnFunction(Function &Fn) {
- // Make sure we re-emit a set of the global base reg if necessary
- GlobalBaseReg = 0;
- return SelectionDAGISel::runOnFunction(Fn);
- }
-
virtual const char *getPassName() const {
return "X86 DAG->DAG Instruction Selection";
}
@@ -1174,9 +1164,8 @@
/// initialize the global base register, if necessary.
///
SDNode *X86DAGToDAGISel::getGlobalBaseReg() {
- assert(!Subtarget->is64Bit() && "X86-64 PIC uses RIP relative addressing");
- if (!GlobalBaseReg)
- GlobalBaseReg = TM.getInstrInfo()->initializeGlobalBaseReg(BB->getParent());
+ MachineFunction *MF = CurBB->getParent();
+ unsigned GlobalBaseReg = TM.getInstrInfo()->getGlobalBaseReg(MF);
return CurDAG->getRegister(GlobalBaseReg, TLI.getPointerTy()).getNode();
}
Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=56825&r1=56824&r2=56825&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Mon Sep 29 19:58:23 2008
@@ -2947,10 +2947,19 @@
return Size;
}
-/// initializeGlobalBaseReg - Output the instructions required to put the
-/// base address to use for accessing globals into a register.
+/// getGlobalBaseReg - Return a virtual register initialized with the
+/// the global base register value. Output instructions required to
+/// initialize the register in the function entry block, if necessary.
///
-unsigned X86InstrInfo::initializeGlobalBaseReg(MachineFunction *MF) const {
+unsigned X86InstrInfo::getGlobalBaseReg(MachineFunction *MF) const {
+ assert(!TM.getSubtarget<X86Subtarget>().is64Bit() &&
+ "X86-64 PIC uses RIP relative addressing");
+
+ X86MachineFunctionInfo *X86FI = MF->getInfo<X86MachineFunctionInfo>();
+ unsigned GlobalBaseReg = X86FI->getGlobalBaseReg();
+ if (GlobalBaseReg != 0)
+ return GlobalBaseReg;
+
// Insert the set of GlobalBaseReg into the first MBB of the function
MachineBasicBlock &FirstMBB = MF->front();
MachineBasicBlock::iterator MBBI = FirstMBB.begin();
@@ -2966,12 +2975,14 @@
// not to pc, but to _GLOBAL_ADDRESS_TABLE_ external
if (TM.getRelocationModel() == Reloc::PIC_ &&
TM.getSubtarget<X86Subtarget>().isPICStyleGOT()) {
- unsigned GlobalBaseReg =
+ GlobalBaseReg =
RegInfo.createVirtualRegister(X86::GR32RegisterClass);
BuildMI(FirstMBB, MBBI, TII->get(X86::ADD32ri), GlobalBaseReg)
.addReg(PC).addExternalSymbol("_GLOBAL_OFFSET_TABLE_");
- return GlobalBaseReg;
+ } else {
+ GlobalBaseReg = PC;
}
- return PC;
+ X86FI->setGlobalBaseReg(GlobalBaseReg);
+ return GlobalBaseReg;
}
Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.h?rev=56825&r1=56824&r2=56825&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.h (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.h Mon Sep 29 19:58:23 2008
@@ -414,10 +414,11 @@
///
virtual unsigned GetInstSizeInBytes(const MachineInstr *MI) const;
- /// initializeGlobalBaseReg - Output the instructions required to put the
- /// base address to use for accessing globals into a register.
+ /// getGlobalBaseReg - Return a virtual register initialized with the
+ /// the global base register value. Output instructions required to
+ /// initialize the register in the function entry block, if necessary.
///
- unsigned initializeGlobalBaseReg(MachineFunction *MF) const;
+ unsigned getGlobalBaseReg(MachineFunction *MF) const;
private:
MachineInstr* foldMemoryOperand(MachineFunction &MF,
Modified: llvm/trunk/lib/Target/X86/X86MachineFunctionInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86MachineFunctionInfo.h?rev=56825&r1=56824&r2=56825&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86MachineFunctionInfo.h (original)
+++ llvm/trunk/lib/Target/X86/X86MachineFunctionInfo.h Mon Sep 29 19:58:23 2008
@@ -58,6 +58,10 @@
/// holds the virtual register into which the sret argument is passed.
unsigned SRetReturnReg;
+ /// GlobalBaseReg - keeps track of the virtual register mapped onto global
+ /// base register.
+ unsigned GlobalBaseReg;
+
public:
X86MachineFunctionInfo() : ForceFramePointer(false),
CalleeSavedFrameSize(0),
@@ -65,7 +69,8 @@
DecorationStyle(None),
ReturnAddrIndex(0),
TailCallReturnAddrDelta(0),
- SRetReturnReg(0) {}
+ SRetReturnReg(0),
+ GlobalBaseReg(0) {}
X86MachineFunctionInfo(MachineFunction &MF) : ForceFramePointer(false),
CalleeSavedFrameSize(0),
@@ -73,7 +78,8 @@
DecorationStyle(None),
ReturnAddrIndex(0),
TailCallReturnAddrDelta(0),
- SRetReturnReg(0) {}
+ SRetReturnReg(0),
+ GlobalBaseReg(0) {}
bool getForceFramePointer() const { return ForceFramePointer;}
void setForceFramePointer(bool forceFP) { ForceFramePointer = forceFP; }
@@ -95,6 +101,9 @@
unsigned getSRetReturnReg() const { return SRetReturnReg; }
void setSRetReturnReg(unsigned Reg) { SRetReturnReg = Reg; }
+
+ unsigned getGlobalBaseReg() const { return GlobalBaseReg; }
+ void setGlobalBaseReg(unsigned Reg) { GlobalBaseReg = Reg; }
};
} // End llvm namespace
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