[llvm-commits] [llvm] r55703 - /llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp

[Owen Anderson]

Author: resistor
Date: Wed Sep  3 12:37:03 2008
New Revision: 55703

URL: http://llvm.org/viewvc/llvm-project?rev=55703&view=rev
Log:
Fix an issue where we were reusing materializations of constants in blocks not dominated by the materialization.  This is
the simple fix, materializing the constant before every use.  It might be better to either track domination of uses or
to materialize all constants and the beginning of the function and let remat sort when to do materialization at uses.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp?rev=55703&r1=55702&r2=55703&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp Wed Sep  3 12:37:03 2008
@@ -21,21 +21,26 @@
 #include "llvm/Target/TargetMachine.h"
 using namespace llvm;
 
+// Don't cache constant materializations.  To do so would require
+// tracking what uses they dominate.  Non-constants, however, already
+// have the SSA def-doms-use requirement enforced, so we can cache their
+// computations.
 unsigned FastISel::getRegForValue(Value *V,
                                   DenseMap<const Value*, unsigned> &ValueMap) {
-  unsigned &Reg = ValueMap[V];
-  if (Reg != 0)
-    return Reg;
+  if (ValueMap.count(V))
+    return ValueMap[V];
 
   MVT::SimpleValueType VT = TLI.getValueType(V->getType()).getSimpleVT();
   if (ConstantInt *CI = dyn_cast<ConstantInt>(V)) {
     if (CI->getValue().getActiveBits() > 64)
       return 0;
-    Reg = FastEmit_i(VT, VT, ISD::Constant, CI->getZExtValue());
+    // Don't cache constant materializations.  To do so would require
+    // tracking what uses they dominate.
+    return FastEmit_i(VT, VT, ISD::Constant, CI->getZExtValue());
   } else if (isa<ConstantPointerNull>(V)) {
-    Reg = FastEmit_i(VT, VT, ISD::Constant, 0);
+    return FastEmit_i(VT, VT, ISD::Constant, 0);
   } else if (ConstantFP *CF = dyn_cast<ConstantFP>(V)) {
-    Reg = FastEmit_f(VT, VT, ISD::ConstantFP, CF);
+    unsigned Reg = FastEmit_f(VT, VT, ISD::ConstantFP, CF);
 
     if (!Reg) {
       const APFloat &Flt = CF->getValueAPF();
@@ -56,12 +61,13 @@
       if (Reg == 0)
         return 0;
     }
+    
+    return Reg;
   } else if (isa<UndefValue>(V)) {
-    Reg = createResultReg(TLI.getRegClassFor(VT));
+    unsigned Reg = createResultReg(TLI.getRegClassFor(VT));
     BuildMI(MBB, TII.get(TargetInstrInfo::IMPLICIT_DEF), Reg);
+    return Reg;
   }
-
-  return Reg;
 }
 
 /// UpdateValueMap - Update the value map to include the new mapping for this