[llvm-commits] [llvm] r55599 - in /llvm/trunk/lib/Target/ARM: ARMInstrFormats.td ARMInstrInfo.td

[Evan Cheng]

Author: evancheng
Date: Mon Sep  1 02:48:18 2008
New Revision: 55599

URL: http://llvm.org/viewvc/llvm-project?rev=55599&view=rev
Log:
ldm / stm instruction encodings.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td

Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=55599&r1=55598&r2=55599&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Mon Sep  1 02:48:18 2008
@@ -577,11 +577,33 @@
 class AI4<bits<4> opcod, dag oops, dag iops, Format f, string opc,
           string asm, list<dag> pattern>
   : I<opcod, oops, iops, AddrMode4, Size4Bytes, IndexModeNone, f, opc,
-      asm, "", pattern>;
-class AXI4<bits<4> opcod, dag oops, dag iops, Format f, string asm,
+      asm, "", pattern> {
+  let Inst{25-27} = 0x4;
+}
+class AXI4ld<bits<4> opcod, dag oops, dag iops, Format f, string asm,
+           list<dag> pattern>
+  : XI<opcod, oops, iops, AddrMode4, Size4Bytes, IndexModeNone, f, asm,
+       "", pattern> {
+  let Inst{20}    = 1; // L bit
+  let Inst{22}    = 0; // S bit
+  let Inst{25-27} = 0x4;
+}
+class AXI4ldpc<bits<4> opcod, dag oops, dag iops, Format f, string asm,
            list<dag> pattern>
   : XI<opcod, oops, iops, AddrMode4, Size4Bytes, IndexModeNone, f, asm,
-       "", pattern>;
+       "", pattern> {
+  let Inst{20}    = 1; // L bit
+  let Inst{22}    = 1; // S bit
+  let Inst{25-27} = 0x4;
+}
+class AXI4st<bits<4> opcod, dag oops, dag iops, Format f, string asm,
+           list<dag> pattern>
+  : XI<opcod, oops, iops, AddrMode4, Size4Bytes, IndexModeNone, f, asm,
+       "", pattern> {
+  let Inst{20}    = 0; // L bit
+  let Inst{22}    = 0; // S bit
+  let Inst{25-27} = 0x4;
+}
 
 
 // BR_JT instructions

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=55599&r1=55598&r2=55599&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Mon Sep  1 02:48:18 2008
@@ -523,7 +523,7 @@
 // FIXME: $dst1 should be a def. But the extra ops must be in the end of the
 // operand list.
 let isReturn = 1, isTerminator = 1 in
-  def LDM_RET : AXI4<0x0, (outs),
+  def LDM_RET : AXI4ldpc<0x0, (outs),
                     (ins addrmode4:$addr, pred:$p, reglist:$dst1, variable_ops),
                     LdFrm, "ldm${p}${addr:submode} $addr, $dst1",
                     []>;
@@ -725,13 +725,13 @@
 
 // FIXME: $dst1 should be a def.
 let mayLoad = 1 in
-def LDM : AXI4<0x0, (outs),
+def LDM : AXI4ld<0x0, (outs),
                (ins addrmode4:$addr, pred:$p, reglist:$dst1, variable_ops),
                LdFrm, "ldm${p}${addr:submode} $addr, $dst1",
                []>;
 
 let mayStore = 1 in
-def STM : AXI4<0x0, (outs),
+def STM : AXI4st<0x0, (outs),
                (ins addrmode4:$addr, pred:$p, reglist:$src1, variable_ops),
                StFrm, "stm${p}${addr:submode} $addr, $src1",
                []>;