[llvm-commits] [llvm] r55476 - in /llvm/trunk: include/llvm/CodeGen/FastISel.h lib/CodeGen/SelectionDAG/FastISel.cpp

Owen Anderson resistor at mac.com
Thu Aug 28 10:47:37 PDT 2008


Author: resistor
Date: Thu Aug 28 12:47:37 2008
New Revision: 55476

URL: http://llvm.org/viewvc/llvm-project?rev=55476&view=rev
Log:
FastEmitInst_extractsubreg doesn't need to be passed the register class.  It can get it from MachineRegisterInfo instead.

Modified:
    llvm/trunk/include/llvm/CodeGen/FastISel.h
    llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp

Modified: llvm/trunk/include/llvm/CodeGen/FastISel.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/FastISel.h?rev=55476&r1=55475&r2=55476&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/FastISel.h (original)
+++ llvm/trunk/include/llvm/CodeGen/FastISel.h Thu Aug 28 12:47:37 2008
@@ -195,8 +195,7 @@
 
   /// FastEmitInst_extractsubreg - Emit a MachineInstr for an extract_subreg
   /// from a specified index of a superregister.
-  unsigned FastEmitInst_extractsubreg(const TargetRegisterClass *RC,
-                                      unsigned Op0, uint32_t Idx);
+  unsigned FastEmitInst_extractsubreg(unsigned Op0, uint32_t Idx);
 
 private:
   unsigned getRegForValue(Value *V,

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp?rev=55476&r1=55475&r2=55476&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp Thu Aug 28 12:47:37 2008
@@ -587,8 +587,8 @@
   return ResultReg;
 }
 
-unsigned FastISel::FastEmitInst_extractsubreg(const TargetRegisterClass *RC,
-                                              unsigned Op0, uint32_t Idx) {
+unsigned FastISel::FastEmitInst_extractsubreg(unsigned Op0, uint32_t Idx) {
+  const TargetRegisterClass* RC = MRI.getRegClass(Op0);
   const TargetRegisterClass* SRC = *(RC->subregclasses_begin()+Idx-1);
   
   unsigned ResultReg = createResultReg(SRC);





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