[llvm-commits] [llvm] r55008 - /llvm/trunk/utils/TableGen/FastISelEmitter.cpp

[Dan Gohman]

Author: djg
Date: Tue Aug 19 15:58:14 2008
New Revision: 55008

URL: http://llvm.org/viewvc/llvm-project?rev=55008&view=rev
Log:
For now, restrict FastISel to instructions that only involve one
register class.

Modified:
    llvm/trunk/utils/TableGen/FastISelEmitter.cpp

Modified: llvm/trunk/utils/TableGen/FastISelEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/FastISelEmitter.cpp?rev=55008&r1=55007&r2=55008&view=diff

==============================================================================
--- llvm/trunk/utils/TableGen/FastISelEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/FastISelEmitter.cpp Tue Aug 19 15:58:14 2008
@@ -62,7 +62,8 @@
   ///
   bool initialize(TreePatternNode *InstPatNode,
                   const CodeGenTarget &Target,
-                  MVT::SimpleValueType VT) {
+                  MVT::SimpleValueType VT,
+                  const CodeGenRegisterClass *DstRC) {
     for (unsigned i = 0, e = InstPatNode->getNumChildren(); i != e; ++i) {
       TreePatternNode *Op = InstPatNode->getChild(i);
       if (!Op->isLeaf())
@@ -82,6 +83,9 @@
       const CodeGenRegisterClass *RC = &Target.getRegisterClass(OpLeafRec);
       if (!RC)
         return false;
+      // For now, all the operands must have the same register class.
+      if (DstRC != RC)
+        return false;
       // For now, all the operands must have the same type.
       if (Op->getTypeNum(0) != VT)
         return false;
@@ -230,7 +234,7 @@
 
     // Check all the operands.
     OperandsSignature Operands;
-    if (!Operands.initialize(InstPatNode, Target, VT))
+    if (!Operands.initialize(InstPatNode, Target, VT, DstRC))
       continue;
 
     // If it's not a known signature, ignore it.