[llvm-commits] [llvm] r54656 - in /llvm/trunk/lib: ExecutionEngine/JIT/JITEmitter.cpp Target/X86/X86CodeEmitter.cpp Target/X86/X86ISelDAGToDAG.cpp Target/X86/X86TargetMachine.cpp
Dale Johannesen
dalej at apple.com
Mon Aug 11 16:46:25 PDT 2008
Author: johannes
Date: Mon Aug 11 18:46:25 2008
New Revision: 54656
URL: http://llvm.org/viewvc/llvm-project?rev=54656&view=rev
Log:
Some fixes for x86-64 JIT. Make it use small code
model, except for external calls; this makes
addressing modes PC-relative. Incomplete.
The assertion at the top of Emitter::runOnMachineFunction
was obviously bogus (always true) so I removed it.
If someone knows what the correct test should be to cover
all the various targets, please fix.
Modified:
llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp
llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp
llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
llvm/trunk/lib/Target/X86/X86TargetMachine.cpp
Modified: llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp?rev=54656&r1=54655&r2=54656&view=diff
==============================================================================
--- llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp (original)
+++ llvm/trunk/lib/ExecutionEngine/JIT/JITEmitter.cpp Mon Aug 11 18:46:25 2008
@@ -920,9 +920,22 @@
Relocations.clear();
#ifndef NDEBUG
+ {
+ DOUT << std::hex;
+ int i;
+ unsigned char* q = FnStart;
+ for (i=1; q!=FnEnd; q++, i++) {
+ if (i%8==1)
+ DOUT << "0x" << (long)q << ": ";
+ DOUT<< (unsigned short)*q << " ";
+ if (i%8==0)
+ DOUT<<"\n";
+ }
+ DOUT << std::dec;
if (sys::hasDisassembler())
DOUT << "Disassembled code:\n"
<< sys::disassembleBuffer(FnStart, FnEnd-FnStart, (uintptr_t)FnStart);
+ }
#endif
if (ExceptionHandling) {
uintptr_t ActualSize = 0;
Modified: llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp?rev=54656&r1=54655&r2=54656&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp Mon Aug 11 18:46:25 2008
@@ -106,10 +106,7 @@
}
bool Emitter::runOnMachineFunction(MachineFunction &MF) {
- assert((MF.getTarget().getRelocationModel() != Reloc::Default ||
- MF.getTarget().getRelocationModel() != Reloc::Static) &&
- "JIT relocation model must be set to static or default!");
-
+
MCE.setModuleInfo(&getAnalysis<MachineModuleInfo>());
II = TM.getInstrInfo();
@@ -517,11 +514,16 @@
if (CurOp != NumOps) {
const MachineOperand &MO = MI.getOperand(CurOp++);
+DOUT << "RawFrm CurOp " << CurOp << "\n";
+DOUT << "isMachineBasicBlock " << MO.isMachineBasicBlock() << "\n";
+DOUT << "isGlobalAddress " << MO.isGlobalAddress() << "\n";
+DOUT << "isExternalSymbol " << MO.isExternalSymbol() << "\n";
+DOUT << "isImmediate " << MO.isImmediate() << "\n";
if (MO.isMachineBasicBlock()) {
emitPCRelativeBlockAddress(MO.getMBB());
} else if (MO.isGlobalAddress()) {
- bool NeedStub = (Is64BitMode && TM.getCodeModel() == CodeModel::Large)
- || Opcode == X86::TAILJMPd;
+ // Assume undefined functions may be outside the Small codespace.
+ bool NeedStub = Is64BitMode || Opcode == X86::TAILJMPd;
emitGlobalAddress(MO.getGlobal(), X86::reloc_pcrel_word,
0, 0, NeedStub);
} else if (MO.isExternalSymbol()) {
@@ -545,8 +547,6 @@
else {
unsigned rt = Is64BitMode ? X86::reloc_pcrel_word
: (IsPIC ? X86::reloc_picrel_word : X86::reloc_absolute_word);
- if (Opcode == X86::MOV64ri)
- rt = X86::reloc_absolute_dword; // FIXME: add X86II flag?
if (MO1.isGlobalAddress()) {
bool NeedStub = isa<Function>(MO1.getGlobal());
bool isLazy = gvNeedsLazyPtr(MO1.getGlobal());
@@ -617,8 +617,6 @@
else {
unsigned rt = Is64BitMode ? X86::reloc_pcrel_word
: (IsPIC ? X86::reloc_picrel_word : X86::reloc_absolute_word);
- if (Opcode == X86::MOV64ri32)
- rt = X86::reloc_absolute_word; // FIXME: add X86II flag?
if (MO1.isGlobalAddress()) {
bool NeedStub = isa<Function>(MO1.getGlobal());
bool isLazy = gvNeedsLazyPtr(MO1.getGlobal());
@@ -654,8 +652,6 @@
else {
unsigned rt = Is64BitMode ? X86::reloc_pcrel_word
: (IsPIC ? X86::reloc_picrel_word : X86::reloc_absolute_word);
- if (Opcode == X86::MOV64mi32)
- rt = X86::reloc_absolute_word; // FIXME: add X86II flag?
if (MO.isGlobalAddress()) {
bool NeedStub = isa<Function>(MO.getGlobal());
bool isLazy = gvNeedsLazyPtr(MO.getGlobal());
Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=54656&r1=54655&r2=54656&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Mon Aug 11 18:46:25 2008
@@ -35,6 +35,7 @@
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/MathExtras.h"
+#include "llvm/Support/Streams.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/Statistic.h"
#include <queue>
@@ -77,6 +78,23 @@
: BaseType(RegBase), isRIPRel(false), Scale(1), IndexReg(), Disp(0),
GV(0), CP(0), ES(0), JT(-1), Align(0) {
}
+ void dump() {
+ cerr << "X86ISelAddressMode " << this << "\n";
+ cerr << "Base.Reg "; if (Base.Reg.Val!=0) Base.Reg.Val->dump();
+ else cerr << "nul";
+ cerr << " Base.FrameIndex " << Base.FrameIndex << "\n";
+ cerr << "isRIPRel " << isRIPRel << " Scale" << Scale << "\n";
+ cerr << "IndexReg "; if (IndexReg.Val!=0) IndexReg.Val->dump();
+ else cerr << "nul";
+ cerr << " Disp " << Disp << "\n";
+ cerr << "GV "; if (GV) GV->dump();
+ else cerr << "nul";
+ cerr << " CP "; if (CP) CP->dump();
+ else cerr << "nul";
+ cerr << "\n";
+ cerr << "ES "; if (ES) cerr << ES; else cerr << "nul";
+ cerr << " JT" << JT << " Align" << Align << "\n";
+ }
};
}
@@ -676,6 +694,7 @@
/// addressing mode.
bool X86DAGToDAGISel::MatchAddress(SDValue N, X86ISelAddressMode &AM,
bool isRoot, unsigned Depth) {
+DOUT << "MatchAddress: "; DEBUG(AM.dump());
// Limit recursion.
if (Depth > 5)
return MatchAddressBase(N, AM, isRoot, Depth);
@@ -707,6 +726,9 @@
}
case X86ISD::Wrapper: {
+DOUT << "Wrapper: 64bit " << Subtarget->is64Bit();
+DOUT << " AM "; DEBUG(AM.dump()); DOUT << "\n";
+DOUT << "AlreadySelected " << AlreadySelected << "\n";
bool is64Bit = Subtarget->is64Bit();
// Under X86-64 non-small code model, GV (and friends) are 64-bits.
// Also, base and index reg must be 0 in order to use rip as base.
Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.cpp?rev=54656&r1=54655&r2=54656&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetMachine.cpp Mon Aug 11 18:46:25 2008
@@ -194,12 +194,14 @@
bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
bool DumpAsm, MachineCodeEmitter &MCE) {
// FIXME: Move this to TargetJITInfo!
- if (DefRelocModel == Reloc::Default)
+ // Do not override 64-bit setting made in X86TargetMachine().
+ if (DefRelocModel == Reloc::Default && !Subtarget.is64Bit())
setRelocationModel(Reloc::Static);
- // JIT cannot ensure globals are placed in the lower 4G of address.
+ // 64-bit JIT places everything in the same buffer except external functions.
+ // Use small code model but hack the call instruction for externals.
if (Subtarget.is64Bit())
- setCodeModel(CodeModel::Large);
+ setCodeModel(CodeModel::Small);
PM.add(createX86CodeEmitterPass(*this, MCE));
if (DumpAsm)
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