[llvm-commits] [llvm] r54248 - in /llvm/trunk: include/llvm/Target/TargetOptions.h lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp lib/Target/PowerPC/PPCISelLowering.cpp lib/Target/PowerPC/PPCTargetMachine.cpp lib/Target/TargetMachine.cpp

Evan Cheng evan.cheng at apple.com
Tue Aug 5 00:19:01 PDT 2008


On Aug 4, 2008, at 11:41 PM, Chris Lattner wrote:

>
> On Jul 31, 2008, at 11:13 AM, Dale Johannesen wrote:
>
>> Author: johannes
>> Date: Thu Jul 31 13:13:12 2008
>> New Revision: 54248
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=54248&view=rev
>> Log:
>> Add a flag to disable jump table generation (all
>> switches use the binary search algorithm) for
>> environments that don't support it.  PPC64 JIT
>> is such an environment; turn the flag on for that.
>
> Thanks Dale, one tweak:
>
>> +++ llvm/trunk/include/llvm/Target/TargetOptions.h Thu Jul 31
>> 13:13:12 2008
>> @@ -97,6 +97,10 @@
>>  /// VerboseAsm - When this flag is set, the asm printer prints
>> additional
>>  /// comments to asm directives.
>>  extern bool VerboseAsm;
>> +
>> +  /// DisableJumpTables - This flag indicates jump tables should
>> not be
>> +  /// generated.
>> +  extern bool DisableJumpTables;
>
> TargetOptions is for things that clients of the code generator set
> when they want to affect the behavior of codegen.
>
> In this case, jump tables are never valid in ppc64 JIT mode.  Why not
> just have the PPC backend mark BR_JT and BRIND as illegal when in 64-
> bit jit mode?  That way no target-indep code changes.

The issue is PPCTargetLowering doesn't know it's in JIT mode.  
PPCTargetMachine::addCodeEmitter would have to toggle something to let  
it know. It's not exactly clean either.

This is a short term workaround. I suspect teaching PPCJITInfo about  
PIC jumptable is pretty trivial. Once that's done, this whole thing  
can be reverted.

Evan

>
>
> -Chris
>
>
>> +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Thu Jul
>> 31 13:13:12 2008
>> @@ -1916,8 +1916,9 @@
>> }
>>
>> static inline bool areJTsAllowed(const TargetLowering &TLI) {
>> -  return (TLI.isOperationLegal(ISD::BR_JT, MVT::Other) ||
>> -          TLI.isOperationLegal(ISD::BRIND, MVT::Other));
>> +  return !DisableJumpTables &&
>> +          (TLI.isOperationLegal(ISD::BR_JT, MVT::Other) ||
>> +           TLI.isOperationLegal(ISD::BRIND, MVT::Other));
>> }
>>
>> /// handleJTSwitchCase - Emit jumptable for current switch case range
>>
>> Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=54248&r1=54247&r2=54248&view=diff
>>
>> =
>> =
>> =
>> =
>> =
>> =
>> =
>> =
>> = 
>> =====================================================================
>> --- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original)
>> +++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Thu Jul 31
>> 13:13:12 2008
>> @@ -43,7 +43,7 @@
>>  : TargetLowering(TM), PPCSubTarget(*TM.getSubtargetImpl()) {
>>
>>  setPow2DivIsCheap();
>> -
>> +
>>  // Use _setjmp/_longjmp instead of setjmp/longjmp.
>>  setUseUnderscoreSetJmp(true);
>>  setUseUnderscoreLongJmp(true);
>>
>> Modified: llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp?rev=54248&r1=54247&r2=54248&view=diff
>>
>> =
>> =
>> =
>> =
>> =
>> =
>> =
>> =
>> = 
>> =====================================================================
>> --- llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp (original)
>> +++ llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp Thu Jul 31
>> 13:13:12 2008
>> @@ -17,6 +17,7 @@
>> #include "llvm/Module.h"
>> #include "llvm/PassManager.h"
>> #include "llvm/Target/TargetMachineRegistry.h"
>> +#include "llvm/Target/TargetOptions.h"
>> using namespace llvm;
>>
>> // Register the targets
>> @@ -144,6 +145,9 @@
>>    // instructions to materialize arbitrary global variable +
>> function +
>>    // constant pool addresses.
>>    setRelocationModel(Reloc::PIC_);
>> +    // Temporary workaround for the inability of PPC64 JIT to
>> handle jump
>> +    // tables.
>> +    DisableJumpTables = true;
>>  } else {
>>    setRelocationModel(Reloc::Static);
>>  }
>>
>> Modified: llvm/trunk/lib/Target/TargetMachine.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetMachine.cpp?rev=54248&r1=54247&r2=54248&view=diff
>>
>> =
>> =
>> =
>> =
>> =
>> =
>> =
>> =
>> = 
>> =====================================================================
>> --- llvm/trunk/lib/Target/TargetMachine.cpp (original)
>> +++ llvm/trunk/lib/Target/TargetMachine.cpp Thu Jul 31 13:13:12 2008
>> @@ -39,6 +39,7 @@
>>  unsigned StackAlignment;
>>  bool RealignStack;
>>  bool VerboseAsm;
>> +  bool DisableJumpTables;
>> }
>>
>> static cl::opt<bool, true> PrintCode("print-machineinstrs",
>> @@ -156,6 +157,11 @@
>>           cl::location(VerboseAsm),
>>           cl::init(false));
>>
>> +static cl::opt<bool, true>
>> +DisableSwitchTables(cl::Hidden, "disable-jump-tables",
>> +           cl::desc("Do not generate jump tables."),
>> +           cl::location(DisableJumpTables),
>> +           cl::init(false));
>>
>> //---------------------------------------------------------------------------
>> // TargetMachine Class
>>
>>
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