[llvm-commits] [llvm] r53459 - in /llvm/trunk: lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp test/CodeGen/X86/2008-07-11-SHLBy1.ll

[Duncan Sands]

Author: baldrick
Date: Fri Jul 11 11:54:57 2008
New Revision: 53459

URL: http://llvm.org/viewvc/llvm-project?rev=53459&view=rev
Log:
Port a shift-by-1 optimization from LegalizeDAG: it
was presumably added after the rest of the code was
copied to LegalizeTypes.

Added:
    llvm/trunk/test/CodeGen/X86/2008-07-11-SHLBy1.ll
Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp?rev=53459&r1=53458&r2=53459&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp Fri Jul 11 11:54:57 2008
@@ -1556,6 +1556,13 @@
     } else if (Amt == NVTBits) {
       Lo = DAG.getConstant(0, NVT);
       Hi = InL;
+    } else if (Amt == 1) {
+      // Emit this X << 1 as X+X.
+      SDVTList VTList = DAG.getVTList(NVT, MVT::Flag);
+      SDOperand LoOps[2] = { InL, InL };
+      Lo = DAG.getNode(ISD::ADDC, VTList, LoOps, 2);
+      SDOperand HiOps[3] = { InH, InH, Lo.getValue(1) };
+      Hi = DAG.getNode(ISD::ADDE, VTList, HiOps, 3);
     } else {
       Lo = DAG.getNode(ISD::SHL, NVT, InL, DAG.getConstant(Amt, ShTy));
       Hi = DAG.getNode(ISD::OR, NVT,

Added: llvm/trunk/test/CodeGen/X86/2008-07-11-SHLBy1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-07-11-SHLBy1.ll?rev=53459&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-07-11-SHLBy1.ll (added)
+++ llvm/trunk/test/CodeGen/X86/2008-07-11-SHLBy1.ll Fri Jul 11 11:54:57 2008
@@ -0,0 +1,5 @@
+; RUN: llvm-as < %s | llc -march=x86-64 -o - | not grep shr
+define i128 @sl(i128 %x) {
+        %t = shl i128 %x, 1
+        ret i128 %t
+}