[llvm-commits] [llvm] r53035 - in /llvm/trunk: include/llvm/CodeGen/SelectionDAG.h lib/CodeGen/SelectionDAG/LegalizeDAG.cpp lib/CodeGen/SelectionDAG/SelectionDAG.cpp lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp lib/Target/ARM/ARMISelLowering.cpp lib/Target/CellSPU/SPUISelLowering.cpp lib/Target/PowerPC/PPCISelLowering.cpp lib/Target/Sparc/SparcISelLowering.cpp lib/Target/X86/X86ISelLowering.cpp
Mon P Wang
monping at apple.com
Thu Jul 3 23:43:51 PDT 2008
Hi,
The problem with the patch I commit was thought the stack alignment of
the slot was correct, the stores we generated for the StackConvert
assumed the larger alignment. It makes more sense to use the
alignment of source when we store and the alignment of the destination
type when we load. This avoids the problem for that and I get the same
failure with and without the patch in tests. Sorry for the mistake.
-- Mon Ping
Index: include/llvm/CodeGen/SelectionDAG.h
===================================================================
--- include/llvm/CodeGen/SelectionDAG.h (revision 53112)
+++ include/llvm/CodeGen/SelectionDAG.h (working copy)
@@ -589,9 +589,10 @@
void dump() const;
/// CreateStackTemporary - Create a stack temporary, suitable for
holding the
- /// specified value type.
- SDOperand CreateStackTemporary(MVT VT);
-
+ /// specified value type. If minAlign is specified, the slot size
will have
+ /// at least that alignment.
+ SDOperand CreateStackTemporary(MVT VT, unsigned minAlign = 1);
+
/// FoldSetCC - Constant fold a setcc to true or false.
SDOperand FoldSetCC(MVT VT, SDOperand N1,
SDOperand N2, ISD::CondCode Cond);
Index: lib/CodeGen/SelectionDAG/SelectionDAG.cpp
===================================================================
--- lib/CodeGen/SelectionDAG/SelectionDAG.cpp (revision 53112)
+++ lib/CodeGen/SelectionDAG/SelectionDAG.cpp (working copy)
@@ -1080,16 +1080,17 @@
/// CreateStackTemporary - Create a stack temporary, suitable for
holding the
/// specified value type.
-SDOperand SelectionDAG::CreateStackTemporary(MVT VT) {
+SDOperand SelectionDAG::CreateStackTemporary(MVT VT, unsigned
minAlign) {
MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
unsigned ByteSize = VT.getSizeInBits()/8;
const Type *Ty = VT.getTypeForMVT();
- unsigned StackAlign = (unsigned)TLI.getTargetData()-
>getPrefTypeAlignment(Ty);
+ unsigned StackAlign =
+ std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty),
minAlign);
+
int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign);
return getFrameIndex(FrameIdx, TLI.getPointerTy());
}
-
SDOperand SelectionDAG::FoldSetCC(MVT VT, SDOperand N1,
SDOperand N2, ISD::CondCode Cond) {
// These setcc operations always fold.
Index: lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
===================================================================
--- lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (revision 53112)
+++ lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (working copy)
@@ -4871,35 +4871,41 @@
MVT SlotVT,
MVT DestVT) {
// Create the stack frame object.
- SDOperand FIPtr = DAG.CreateStackTemporary(SlotVT);
-
+ unsigned SrcAlign = TLI.getTargetData()->getPrefTypeAlignment(
+
SrcOp.getValueType().getTypeForMVT());
+ SDOperand FIPtr = DAG.CreateStackTemporary(SlotVT, SrcAlign);
+
FrameIndexSDNode *StackPtrFI = cast<FrameIndexSDNode>(FIPtr);
int SPFI = StackPtrFI->getIndex();
-
+
unsigned SrcSize = SrcOp.getValueType().getSizeInBits();
unsigned SlotSize = SlotVT.getSizeInBits();
unsigned DestSize = DestVT.getSizeInBits();
+ unsigned DestAlign = TLI.getTargetData()->getPrefTypeAlignment(
+
DestVT.getTypeForMVT());
// Emit a store to the stack slot. Use a truncstore if the input
value is
// later than DestVT.
SDOperand Store;
+
if (SrcSize > SlotSize)
Store = DAG.getTruncStore(DAG.getEntryNode(), SrcOp, FIPtr,
- PseudoSourceValue::getFixedStack(),
- SPFI, SlotVT);
+ PseudoSourceValue::getFixedStack(),
SPFI, SlotVT,
+ false, SrcAlign);
else {
assert(SrcSize == SlotSize && "Invalid store");
Store = DAG.getStore(DAG.getEntryNode(), SrcOp, FIPtr,
- PseudoSourceValue::getFixedStack(),
- SPFI);
+ PseudoSourceValue::getFixedStack(), SPFI,
+ false, SrcAlign);
}
// Result is a load from the stack slot.
if (SlotSize == DestSize)
- return DAG.getLoad(DestVT, Store, FIPtr, NULL, 0);
+ return DAG.getLoad(DestVT, Store, FIPtr, NULL, 0, false,
DestAlign);
assert(SlotSize < DestSize && "Unknown extension!");
- return DAG.getExtLoad(ISD::EXTLOAD, DestVT, Store, FIPtr, NULL, 0,
SlotVT);
+ return DAG.getExtLoad(ISD::EXTLOAD, DestVT, Store, FIPtr, NULL, 0,
SlotVT,
+ false, DestAlign);
}
On Jul 3, 2008, at 1:09 PM, Mon P Wang wrote:
>
> Thanks, I'll take a look and see what is wrong with it.
>
> -- Mon Ping
>
> On Jul 3, 2008, at 11:20 AM, Evan Cheng wrote:
>
>> This is backed out for now. Mon Ping, please take a look.
>>
>> Evan
>>
>> On Jul 3, 2008, at 9:45 AM, Chris Lattner wrote:
>>
>>>
>>> On Jul 3, 2008, at 2:06 AM, Duncan Sands wrote:
>>>
>>>> Hi Evan,
>>>>
>>>>> test/CodeGen/PowerPC/vec_misaligned.ll is not crashing in the
>>>>> Legalizer. Can you check if your patch is the cause?
>>>>
>>>> it was caused by r53031:
>>>>
>>>> r53031 | wangmp | 2008-07-02 19:07:12 +0200 (Wed, 02 Jul 2008) | 4
>>>> lines
>>>>
>>>> Fixed problem in EmitStackConvert where the source and target type
>>>> have different alignment by creating a stack slot with the max
>>>> alignment of source and target type.
>>>
>>> If this patch is still causing breakage, please revert it. Mon Ping
>>> can track down the problem and reapply when it is fixed.
>>>
>>> -Chris
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