[llvm-commits] [llvm] r52818 - in /llvm/trunk: include/llvm/Target/TargetRegisterInfo.h lib/Target/TargetRegisterInfo.cpp

[Owen Anderson]

That won't be any smaller than just attaching a bitvector to each  
TargetRegDesc, which you didn't like because it wasted space.  The  
advantage of the std::set approach is that it's sparse, so we don't  
waste a large amount of space representing non-interferences.

--Owen

On Jun 27, 2008, at 8:18 AM, Evan Cheng wrote:

> How about having tblgen create a two-dimensional array that represents
> the aliasing relationship? You can use a bitvector representation, it
> wouldn't be expensive at all if there is one for the whole target.The
> map should be owned by each TargetRegisterInfo. Take a look at the
> code in X86GenRegisterInfo.inc to get a flavor what it would look  
> like.
>
> Evan
>
> On Jun 27, 2008, at 12:27 AM, Owen Anderson wrote:
>
>> I thought this was the approach we'd agreed on at the end of today?
>> I don't know how to have tblgen create this information without
>> attaching it to each TargetRegisterDesc, which will be very costly
>> in terms of memory footprint.
>>
>> --Owen
>>
>> On Jun 27, 2008, at 12:19 AM, Evan Cheng wrote:
>>
>>> Is this really the right approach? I thought we want tblgen at build
>>> time to create these matrices to speed up queries. Suppose we are
>>> compiling a bunch of small programs. We'd be recomputing the set
>>> everytime.
>>>
>>> Evan
>>>
>>> On Jun 26, 2008, at 11:56 PM, Owen Anderson wrote:
>>>
>>>> Author: resistor
>>>> Date: Fri Jun 27 01:56:04 2008
>>>> New Revision: 52818
>>>>
>>>> URL: http://llvm.org/viewvc/llvm-project?rev=52818&view=rev
>>>> Log:
>>>> Cache subregister relationships in a set in TargetRegisterInfo to
>>>> allow faster lookups.
>>>> This speeds up LiveVariables from 0.6279s to 0.6165s on kimwitu++.
>>>>
>>>> Modified:
>>>> llvm/trunk/include/llvm/Target/TargetRegisterInfo.h
>>>> llvm/trunk/lib/Target/TargetRegisterInfo.cpp
>>>>
>>>> Modified: llvm/trunk/include/llvm/Target/TargetRegisterInfo.h
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetRegisterInfo.h?rev=52818&r1=52817&r2=52818&view=diff
>>>>
>>>> =
>>>> =
>>>> =
>>>> =
>>>> =
>>>> =
>>>> =
>>>> =
>>>> =
>>>> =
>>>> = 
>>>> ===================================================================
>>>> --- llvm/trunk/include/llvm/Target/TargetRegisterInfo.h (original)
>>>> +++ llvm/trunk/include/llvm/Target/TargetRegisterInfo.h Fri Jun 27
>>>> 01:56:04 2008
>>>> @@ -21,6 +21,7 @@
>>>> #include "llvm/CodeGen/ValueTypes.h"
>>>> #include <cassert>
>>>> #include <functional>
>>>> +#include <set>
>>>>
>>>> namespace llvm {
>>>>
>>>> @@ -285,6 +286,7 @@
>>>> regclass_iterator RegClassBegin, RegClassEnd;   // List of
>>>> regclasses
>>>>
>>>> int CallFrameSetupOpcode, CallFrameDestroyOpcode;
>>>> +  std::set<std::pair<unsigned, unsigned> > Subregs;
>>>> protected:
>>>> TargetRegisterInfo(const TargetRegisterDesc *D, unsigned NR,
>>>>                   regclass_iterator RegClassBegin,
>>>> @@ -419,9 +421,7 @@
>>>> /// isSubRegister - Returns true if regB is a sub-register of regA.
>>>> ///
>>>> bool isSubRegister(unsigned regA, unsigned regB) const {
>>>> -    for (const unsigned *SR = getSubRegisters(regA); *SR; ++SR)
>>>> -      if (*SR == regB) return true;
>>>> -    return false;
>>>> +    return Subregs.count(std::make_pair(regA, regB));
>>>> }
>>>>
>>>> /// isSuperRegister - Returns true if regB is a super-register of
>>>> regA.
>>>>
>>>> Modified: llvm/trunk/lib/Target/TargetRegisterInfo.cpp
>>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetRegisterInfo.cpp?rev=52818&r1=52817&r2=52818&view=diff
>>>>
>>>> =
>>>> =
>>>> =
>>>> =
>>>> =
>>>> =
>>>> =
>>>> =
>>>> =
>>>> =
>>>> = 
>>>> ===================================================================
>>>> --- llvm/trunk/lib/Target/TargetRegisterInfo.cpp (original)
>>>> +++ llvm/trunk/lib/Target/TargetRegisterInfo.cpp Fri Jun 27  
>>>> 01:56:04
>>>> 2008
>>>> @@ -29,6 +29,16 @@
>>>>
>>>> CallFrameSetupOpcode   = CFSO;
>>>> CallFrameDestroyOpcode = CFDO;
>>>> +
>>>> +  for (unsigned i = 0; i < NumRegs; ++i) {
>>>> +    const TargetRegisterDesc* CurrReg = Desc + i;
>>>> +
>>>> +    // Initialize the Subregs set, which stores pairs (a, b) where
>>>> +    // b is a subreg of a.
>>>> +    if (CurrReg->SubRegs)
>>>> +      for (const unsigned* CurrSR = CurrReg->SubRegs; *CurrSR; +
>>>> +CurrSR)
>>>> +        Subregs.insert(std::make_pair(i, *CurrSR));
>>>> +  }
>>>> }
>>>>
>>>> TargetRegisterInfo::~TargetRegisterInfo() {}
>>>>
>>>>
>>>> _______________________________________________
>>>> llvm-commits mailing list
>>>> llvm-commits at cs.uiuc.edu
>>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>>>
>>> _______________________________________________
>>> llvm-commits mailing list
>>> llvm-commits at cs.uiuc.edu
>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>>
>> _______________________________________________
>> llvm-commits mailing list
>> llvm-commits at cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits