[llvm-commits] [llvm] r52276 - /llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

[Duncan Sands]

Author: baldrick
Date: Sat Jun 14 12:48:34 2008
New Revision: 52276

URL: http://llvm.org/viewvc/llvm-project?rev=52276&view=rev
Log:
Remove a redundant AfterLegalize check.  Turn
on some code when !AfterLegalize - but since
this whole code section is turned off by an
"if (0)" it's not really turning anything on.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=52276&r1=52275&r2=52276&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Sat Jun 14 12:48:34 2008
@@ -4758,8 +4758,7 @@
       // original load.
       unsigned NewAlign = TLI.getTargetMachine().getTargetData()->
         getABITypeAlignment(LVT.getTypeForMVT());
-      if (NewAlign > Align ||
-          (AfterLegalize && !TLI.isOperationLegal(ISD::LOAD, LVT)))
+      if (NewAlign > Align || !TLI.isOperationLegal(ISD::LOAD, LVT))
         return SDOperand();
       Align = NewAlign;
     }
@@ -5350,7 +5349,8 @@
   // otherwise, go ahead with the folds.
   if (0 && N3C && N3C->isNullValue() && N2C && (N2C->getAPIntValue() == 1ULL)) {
     MVT XType = N0.getValueType();
-    if (TLI.isOperationLegal(ISD::SETCC, TLI.getSetCCResultType(N0))) {
+    if (!AfterLegalize ||
+        TLI.isOperationLegal(ISD::SETCC, TLI.getSetCCResultType(N0))) {
       SDOperand Res = DAG.getSetCC(TLI.getSetCCResultType(N0), N0, N1, CC);
       if (Res.getValueType() != VT)
         Res = DAG.getNode(ISD::ZERO_EXTEND, VT, Res);
@@ -5359,7 +5359,8 @@
     
     // seteq X, 0 -> srl (ctlz X, log2(size(X)))
     if (N1C && N1C->isNullValue() && CC == ISD::SETEQ && 
-        TLI.isOperationLegal(ISD::CTLZ, XType)) {
+        (!AfterLegalize ||
+         TLI.isOperationLegal(ISD::CTLZ, XType))) {
       SDOperand Ctlz = DAG.getNode(ISD::CTLZ, XType, N0);
       return DAG.getNode(ISD::SRL, XType, Ctlz, 
                          DAG.getConstant(Log2_32(XType.getSizeInBits()),