[llvm-commits] [llvm] r51192 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

[Evan Cheng]

Author: evancheng
Date: Fri May 16 12:19:05 2008
New Revision: 51192

URL: http://llvm.org/viewvc/llvm-project?rev=51192&view=rev
Log:
If the result of a BIT_CONVERT is a v1* vector, it doesn't mean its source is a v1* vector.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=51192&r1=51191&r2=51192&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Fri May 16 12:19:05 2008
@@ -7109,10 +7109,13 @@
     Result = Node->getOperand(0);
     assert(Result.getValueType() == NewVT);
     break;
-  case ISD::BIT_CONVERT:
-    Result = DAG.getNode(ISD::BIT_CONVERT, NewVT,
-                         ScalarizeVectorOp(Op.getOperand(0)));
+  case ISD::BIT_CONVERT: {
+    SDOperand Op0 = Op.getOperand(0);
+    if (MVT::getVectorNumElements(Op0.getValueType()) == 1)
+      Op0 = ScalarizeVectorOp(Op0);
+    Result = DAG.getNode(ISD::BIT_CONVERT, NewVT, Op0);
     break;
+  }
   case ISD::SELECT:
     Result = DAG.getNode(ISD::SELECT, NewVT, Op.getOperand(0),
                          ScalarizeVectorOp(Op.getOperand(1)),