[llvm-commits] [llvm] r50981 - in /llvm/branches/release_23: lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/2008-05-09-ShuffleLoweringBug.ll

Tanya Lattner tonic at nondot.org
Mon May 12 10:55:40 PDT 2008


Author: tbrethou
Date: Mon May 12 12:55:39 2008
New Revision: 50981

URL: http://llvm.org/viewvc/llvm-project?rev=50981&view=rev
Log:
Merge from mainline.
When transforming a vector_shuffle to a load, the base address must not be an undef.

Added:
    llvm/branches/release_23/test/CodeGen/X86/2008-05-09-ShuffleLoweringBug.ll
      - copied unchanged from r50940, llvm/trunk/test/CodeGen/X86/2008-05-09-ShuffleLoweringBug.ll
Modified:
    llvm/branches/release_23/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/branches/release_23/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_23/lib/Target/X86/X86ISelLowering.cpp?rev=50981&r1=50980&r2=50981&view=diff

==============================================================================
--- llvm/branches/release_23/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/branches/release_23/lib/Target/X86/X86ISelLowering.cpp Mon May 12 12:55:39 2008
@@ -6283,6 +6283,8 @@
       return false;
     if (!Base) {
       Base = Elt.Val;
+      if (Base->getOpcode() == ISD::UNDEF)
+        return false;
       continue;
     }
     if (Elt.getOpcode() == ISD::UNDEF)





More information about the llvm-commits mailing list