[llvm-commits] [llvm] r50366 - /llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

[Dan Gohman]

Author: djg
Date: Mon Apr 28 13:19:43 2008
New Revision: 50366

URL: http://llvm.org/viewvc/llvm-project?rev=50366&view=rev
Log:
Add a comment to CreateRegForValue that clarifies the handling of
aggregate types.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=50366&r1=50365&r2=50366&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Mon Apr 28 13:19:43 2008
@@ -369,6 +369,10 @@
 /// CreateRegForValue - Allocate the appropriate number of virtual registers of
 /// the correctly promoted or expanded types.  Assign these registers
 /// consecutive vreg numbers and return the first assigned number.
+///
+/// In the case that the given value has struct or array type, this function
+/// will assign registers for each member or element.
+///
 unsigned FunctionLoweringInfo::CreateRegForValue(const Value *V) {
   SmallVector<MVT::ValueType, 4> ValueVTs;
   ComputeValueVTs(TLI, V->getType(), ValueVTs);