[llvm-commits] [llvm] r49715 - in /llvm/trunk: include/llvm/CodeGen/SelectionDAGNodes.h lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp lib/Target/PowerPC/PPCISelLowering.cpp

[Nicolas Geoffray]

Author: geoffray
Date: Tue Apr 15 03:08:50 2008
New Revision: 49715

URL: http://llvm.org/viewvc/llvm-project?rev=49715&view=rev
Log:
Change Divided flag to Split, as suggested by Evan


Modified:
    llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
    llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp

Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h?rev=49715&r1=49714&r2=49715&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Tue Apr 15 03:08:50 2008
@@ -1734,8 +1734,8 @@
     static const uint64_t NestOffs       = 5;
     static const uint64_t ByValAlign     = 0xFULL << 6; //< Struct alignment
     static const uint64_t ByValAlignOffs = 6;
-    static const uint64_t Divided        = 1ULL << 10;
-    static const uint64_t DividedOffs    = 10;
+    static const uint64_t Split          = 1ULL << 10;
+    static const uint64_t SplitOffs      = 10;
     static const uint64_t OrigAlign      = 0x1FULL<<27;
     static const uint64_t OrigAlignOffs  = 27;
     static const uint64_t ByValSize      = 0xffffffffULL << 32; //< Struct size
@@ -1773,8 +1773,8 @@
         (uint64_t(Log2_32(A) + 1) << ByValAlignOffs);
     }
             
-    bool isDivided()   const { return Flags & Divided; }
-    void setDivided()  { Flags |= One << DividedOffs; }
+    bool isSplit()   const { return Flags & Split; }
+    void setSplit()  { Flags |= One << SplitOffs; }
 
     unsigned getOrigAlign() const {
       return (One << ((Flags & OrigAlign) >> OrigAlignOffs)) / 2;

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=49715&r1=49714&r2=49715&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Tue Apr 15 03:08:50 2008
@@ -4164,7 +4164,7 @@
       RetVals.push_back(RegisterVT);
       ISD::ArgFlagsTy MyFlags = Flags;
       if (NumRegs > 1 && i == 0)
-        MyFlags.setDivided();
+        MyFlags.setSplit();
       // if it isn't first piece, alignment must be 1
       else if (i > 0)
         MyFlags.setOrigAlign(1);
@@ -4289,7 +4289,7 @@
       // if it isn't first piece, alignment must be 1
       ISD::ArgFlagsTy MyFlags = Flags;
       if (NumParts > 1 && i == 0)
-        MyFlags.setDivided();
+        MyFlags.setSplit();
       else if (i != 0)
         MyFlags.setOrigAlign(1);
 

Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=49715&r1=49714&r2=49715&view=diff

==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Tue Apr 15 03:08:50 2008
@@ -1423,7 +1423,7 @@
     ISD::ArgFlagsTy Flags =
       cast<ARG_FLAGSSDNode>(Op.getOperand(ArgNo+3))->getArgFlags();
     // See if next argument requires stack alignment in ELF
-    bool Align = Flags.isDivided(); 
+    bool Align = Flags.isSplit(); 
 
     unsigned CurArgOffset = ArgOffset;
 
@@ -1855,7 +1855,7 @@
     ISD::ArgFlagsTy Flags =
       cast<ARG_FLAGSSDNode>(Op.getOperand(5+2*i+1))->getArgFlags();
     // See if next argument requires stack alignment in ELF
-    bool Align = Flags.isDivided();
+    bool Align = Flags.isSplit();
 
     // PtrOff will be used to store the current argument to the stack if a
     // register cannot be found for it.