[llvm-commits] CVS: llvm-www/pubs/2008-03-DATE-TLM_Estimation.html 2008-03-DATE-TLM_Estimation.pdf index.html

Tue Mar 25 16:15:24 PDT 2008

Changes in directory llvm-www/pubs:

2008-03-DATE-TLM_Estimation.html added (r1.1)
2008-03-DATE-TLM_Estimation.pdf added (r1.1)
index.html updated: 1.65 -> 1.66
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 2008-03-DATE-TLM_Estimation.html |   59 +++++++++++++++++++++++++++++++++++++++
 2008-03-DATE-TLM_Estimation.pdf  |    0 
 index.html                       |    5 +++
 3 files changed, 64 insertions(+)


Index: llvm-www/pubs/2008-03-DATE-TLM_Estimation.html
diff -c /dev/null llvm-www/pubs/2008-03-DATE-TLM_Estimation.html:1.1
*** /dev/null	Tue Mar 25 18:14:45 2008

--- llvm-www/pubs/2008-03-DATE-TLM_Estimation.html	Tue Mar 25 18:14:35 2008
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*** 0 ****
--- 1,59 ----
+ <!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
+ <html>
+ <head>
+   <meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
+   <link rel="stylesheet" href="../llvm.css" type="text/css" media="screen">
+   <title>Cycle-approximate Retargetable Performance Estimation at the Transaction Level</title>
+ </head>
+ <body>
+ 
+ <div class="pub_title">
+ Cycle-approximate Retargetable Performance Estimation at the Transaction Level
+ </div>
+ <div class="pub_author">
+   Y. Hwang, S. Abdi, and D. Gajski
+ </div>
+ 
+ <h2>Abstract:</h2>
+ <blockquote>
+ This paper presents a novel cycle-approximate performance estimation technique for automatically generated 
+ transaction level models (TLMs) for heterogeneous multicore designs. The inputs are application C processes and 
+ their mapping to processing units in the platform. The processing unit model consists of pipelined datapath, memory 
+ hierarchy and branch delay model. Using the processing 
+ unit model, the basic blocks in the C processes are analyzed 
+ and annotated with estimated delays. This is followed by 
+ a code generation phase where delay-annotated C code is 
+ generated and linked with a SystemC wrapper consisting of 
+ inter-process communication channels. The generated TLM 
+ is compiled and executed natively on the host machine. Our 
+ key contribution is that the estimation technique is close to 
+ cycle-accurate, it can be applied to any multi-core platform 
+ and it produces high-speed native compiled TLMs. For experiments, timed TLMs for industrial scale designs such as 
+ MP3 decoder were automatically generated for 4 heterogeneous multi-processor platforms with up to 5 PEs under 
+ 1 minute. Each TLM simulated under 1 second, compared 
+ to 3-4 hrs of instruction set simulation (ISS) and 15-18 hrs 
+ of RTL simulation. Comparison to on-board measurement 
+ showed only 8% error on average in estimated number of 
+ cycles. 
+ </blockquote>
+ 
+ <h2>Published:</h2>
+ "Cycle-approximate Retargetable Performance Estimation at the Transaction Level"<br>
+ Y. Hwang, S. Abdi, and D. Gajski<br>
+ <i>Proc. of Design Automation and Test in Europe (DATE'08)</i>, Munich, Germany, March 2008
+ 
+ <h2>Download:</h2>
+ <h3>Paper:</h3>
+ <ul>
+   <li><a href="2008-03-DATE-TLM_Estimation.pdf">Cycle-approximate Retargetable Performance Estimation at the Transaction Level</a> (PDF)</li>
+ </ul>
+ 
+ <!-- *********************************************************************** -->
+ <hr>
+   <a href="http://jigsaw.w3.org/css-validator/check/referer"><img
+   src="http://jigsaw.w3.org/css-validator/images/vcss" alt="Valid CSS!"></a>
+   <a href="http://validator.w3.org/check/referer"><img
+   src="http://www.w3.org/Icons/valid-html401" alt="Valid HTML 4.01!" /></a>
+ 
+ </body>
+ </html>


Index: llvm-www/pubs/2008-03-DATE-TLM_Estimation.pdf


Index: llvm-www/pubs/index.html
diff -u llvm-www/pubs/index.html:1.65 llvm-www/pubs/index.html:1.66
--- llvm-www/pubs/index.html:1.65	Tue Mar 18 14:58:37 2008
+++ llvm-www/pubs/index.html	Tue Mar 25 18:14:34 2008
@@ -3,6 +3,11 @@
 
 <ol>
 
+<li>"<a href="2008-03-DATE-TLM_Estimation.html">Cycle-approximate Retargetable Performance 
+Estimation at the Transaction Level</a>"<br>
+Y. Hwang, S. Abdi, and D. Gajski<br>
+<i>Proc. of Design Automation and Test in Europe (DATE'08)</i>, Munich, Germany, March 2008</li>
+
 <li>"<a href="2008-02-ImpedingMalwareAnalysis.html">Impeding Malware 
 Analysis Using Conditional Code Obfuscation</a>"<br>
 Monirul Sharif, Andrea Lanzi, Jonathon Giffin and Wenke Lee<br>




