[llvm-commits] [llvm] r48239 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

[Chris Lattner]

Author: lattner
Date: Tue Mar 11 14:06:29 2008
New Revision: 48239

URL: http://llvm.org/viewvc/llvm-project?rev=48239&view=rev
Log:
start handling the 'f' x87 constraint.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=48239&r1=48238&r2=48239&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Mar 11 14:06:29 2008
@@ -6238,6 +6238,7 @@
   if (Constraint.size() == 1) {
     switch (Constraint[0]) {
     case 'A':
+    case 'f':
     case 'r':
     case 'R':
     case 'l':
@@ -6399,6 +6400,14 @@
       else if (VT == MVT::i8)
         return std::make_pair(0U, X86::GR8RegisterClass);
       break;
+    case 'f':  // FP Stack registers.
+      // If SSE is enabled for this VT, use f80 to ensure the isel moves the
+      // value to the correct fpstack register class.
+      if (VT == MVT::f32 && !isScalarFPTypeInSSEReg(VT))
+        return std::make_pair(0U, X86::RFP32RegisterClass);
+      if (VT == MVT::f64 && !isScalarFPTypeInSSEReg(VT))
+        return std::make_pair(0U, X86::RFP64RegisterClass);
+      return std::make_pair(0U, X86::RFP80RegisterClass);
     case 'y':   // MMX_REGS if MMX allowed.
       if (!Subtarget->hasMMX()) break;
       return std::make_pair(0U, X86::VR64RegisterClass);