[llvm-commits] [llvm] r47918 - /llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp

[Bill Wendling]

Author: void
Date: Tue Mar  4 17:27:33 2008
New Revision: 47918

URL: http://llvm.org/viewvc/llvm-project?rev=47918&view=rev
Log:
Removed spurious EnablePPCRS check.

Modified:
    llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp

Modified: llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp?rev=47918&r1=47917&r2=47918&view=diff

==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCRegisterInfo.cpp Tue Mar  4 17:27:33 2008
@@ -431,7 +431,6 @@
       .addReg(PPC::R31)
       .addImm(FrameSize);
   } else if (LP64) {
-    if (!EnablePPCRS)
     if (EnablePPCRS) // FIXME (64-bit): Use "true" version.
       BuildMI(MBB, II, TII.get(PPC::LD), Reg)
 	.addImm(0)
@@ -513,15 +512,15 @@
   const TargetRegisterClass *RC = Subtarget.isPPC64() ? G8RC : GPRC;
   unsigned Reg = findScratchRegister(II, RS, RC, SPAdj);
 
-  // We need to store the CR in the low 4-bits of the saved value.  First, issue
-  // an MFCR to save all of the CRBits.
+  // We need to store the CR in the low 4-bits of the saved value. First, issue
+  // an MFCR to save all of the CRBits. Add an implicit kill of the CR.
   if (!MI.getOperand(0).isKill())
     BuildMI(MBB, II, TII.get(PPC::MFCR), Reg);
   else
     // Implicitly kill the CR register.
     BuildMI(MBB, II, TII.get(PPC::MFCR), Reg)
       .addReg(MI.getOperand(0).getReg(), false, true, true);
-
+    
   // If the saved register wasn't CR0, shift the bits left so that they are in
   // CR0's slot.
   unsigned SrcReg = MI.getOperand(0).getReg();