[llvm-commits] [llvm] r47658 - in /llvm/trunk: lib/Target/X86/README-X86-64.txt lib/Target/X86/X86Instr64bit.td test/CodeGen/X86/x86-64-and-mask.ll

[Chris Lattner]

Author: lattner
Date: Tue Feb 26 23:47:54 2008
New Revision: 47658

URL: http://llvm.org/viewvc/llvm-project?rev=47658&view=rev
Log:
Compile x86-64-and-mask.ll into:

_test:
	movl	%edi, %eax
	ret

instead of:

_test:
        movl    $4294967295, %ecx
        movq    %rdi, %rax
        andq    %rcx, %rax
        ret

It would be great to write this as a Pat pattern that used subregs 
instead of a 'pseudo' instruction, but I don't know how to do that
in td files.


Added:
    llvm/trunk/test/CodeGen/X86/x86-64-and-mask.ll
Modified:
    llvm/trunk/lib/Target/X86/README-X86-64.txt
    llvm/trunk/lib/Target/X86/X86Instr64bit.td

Modified: llvm/trunk/lib/Target/X86/README-X86-64.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/README-X86-64.txt?rev=47658&r1=47657&r2=47658&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/README-X86-64.txt (original)
+++ llvm/trunk/lib/Target/X86/README-X86-64.txt Tue Feb 26 23:47:54 2008
@@ -249,15 +249,6 @@
 	addq	$8, %rsp
 	ret
 
-note the dead rsp adjustments.  Also, there is surely a better/shorter way 
-to clear the top 32-bits of a 64-bit register than movl+andq.  Testcase here:
-
-unsigned long long c(unsigned long long a) {return a&4294967295; }
-
-_c:
-	movl	$4294967295, %ecx
-	movq	%rdi, %rax
-	andq	%rcx, %rax
-	ret
+note the dead rsp adjustments.
 
 //===---------------------------------------------------------------------===//

Modified: llvm/trunk/lib/Target/X86/X86Instr64bit.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Instr64bit.td?rev=47658&r1=47657&r2=47658&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86Instr64bit.td (original)
+++ llvm/trunk/lib/Target/X86/X86Instr64bit.td Tue Feb 26 23:47:54 2008
@@ -61,6 +61,13 @@
   return (int64_t)N->getValue() == (int8_t)N->getValue();
 }]>;
 
+def i64immFFFFFFFF  : PatLeaf<(i64 imm), [{
+  // i64immFFFFFFFF - True if this is a specific constant we can't write in
+  // tblgen files.
+  return N->getValue() == 0x00000000FFFFFFFFULL;
+}]>;
+
+
 def sextloadi64i8  : PatFrag<(ops node:$ptr), (i64 (sextloadi8 node:$ptr))>;
 def sextloadi64i16 : PatFrag<(ops node:$ptr), (i64 (sextloadi16 node:$ptr))>;
 def sextloadi64i32 : PatFrag<(ops node:$ptr), (i64 (sextloadi32 node:$ptr))>;
@@ -1091,6 +1098,12 @@
                      "mov{l}\t{$src, ${dst:subreg32}|${dst:subreg32}, $src}",
                      [(set GR64:$dst, (zextloadi64i32 addr:$src))]>;
 
+/// PsAND64rrFFFFFFFF - r = r & (2^32-1)
+def PsAND64rrFFFFFFFF
+  : I<0x89, MRMDestReg, (outs GR64:$dst), (ins GR64:$src),
+  "mov{l}\t{${src:subreg32}, ${dst:subreg32}|${dst:subreg32}, ${src:subreg32}}",
+      [(set GR64:$dst, (and GR64:$src, i64immFFFFFFFF))]>;
+
 
 // Alias instructions that map movr0 to xor. Use xorl instead of xorq; it's
 // equivalent due to implicit zero-extending, and it sometimes has a smaller

Added: llvm/trunk/test/CodeGen/X86/x86-64-and-mask.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x86-64-and-mask.ll?rev=47658&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/X86/x86-64-and-mask.ll (added)
+++ llvm/trunk/test/CodeGen/X86/x86-64-and-mask.ll Tue Feb 26 23:47:54 2008
@@ -0,0 +1,12 @@
+; RUN: llvm-as < %s | llc | grep {movl.*%edi, %eax}
+; This should be a single mov, not a load of immediate + andq.
+
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
+target triple = "x86_64-apple-darwin8"
+
+define i64 @test(i64 %x) nounwind  {
+entry:
+	%tmp123 = and i64 %x, 4294967295		; <i64> [#uses=1]
+	ret i64 %tmp123
+}
+