[llvm-commits] [llvm] r47612 - in /llvm/trunk: lib/CodeGen/SelectionDAG/SelectionDAG.cpp test/CodeGen/X86/invalid-shift-immediate.ll

[Dan Gohman]

Author: djg
Date: Tue Feb 26 12:50:50 2008
New Revision: 47612

URL: http://llvm.org/viewvc/llvm-project?rev=47612&view=rev
Log:
Avoid aborting on invalid shift counts.

Added:
    llvm/trunk/test/CodeGen/X86/invalid-shift-immediate.ll
Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=47612&r1=47611&r2=47612&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Tue Feb 26 12:50:50 2008
@@ -1241,13 +1241,19 @@
   case ISD::SHL:
     // (shl X, C1) & C2 == 0   iff   (X & C2 >>u C1) == 0
     if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
-      ComputeMaskedBits(Op.getOperand(0), Mask.lshr(SA->getValue()),
+      unsigned ShAmt = SA->getValue();
+
+      // If the shift count is an invalid immediate, don't do anything.
+      if (ShAmt >= BitWidth)
+        return;
+
+      ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt),
                         KnownZero, KnownOne, Depth+1);
       assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 
-      KnownZero <<= SA->getValue();
-      KnownOne  <<= SA->getValue();
+      KnownZero <<= ShAmt;
+      KnownOne  <<= ShAmt;
       // low bits known zero.
-      KnownZero |= APInt::getLowBitsSet(BitWidth, SA->getValue());
+      KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
     }
     return;
   case ISD::SRL:
@@ -1255,6 +1261,10 @@
     if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
       unsigned ShAmt = SA->getValue();
 
+      // If the shift count is an invalid immediate, don't do anything.
+      if (ShAmt >= BitWidth)
+        return;
+
       ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt),
                         KnownZero, KnownOne, Depth+1);
       assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 
@@ -1269,6 +1279,10 @@
     if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
       unsigned ShAmt = SA->getValue();
 
+      // If the shift count is an invalid immediate, don't do anything.
+      if (ShAmt >= BitWidth)
+        return;
+
       APInt InDemandedMask = (Mask << ShAmt);
       // If any of the demanded bits are produced by the sign extension, we also
       // demand the input sign bit.

Added: llvm/trunk/test/CodeGen/X86/invalid-shift-immediate.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/invalid-shift-immediate.ll?rev=47612&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/X86/invalid-shift-immediate.ll (added)
+++ llvm/trunk/test/CodeGen/X86/invalid-shift-immediate.ll Tue Feb 26 12:50:50 2008
@@ -0,0 +1,30 @@
+; RUN: llvm-as < %s | llc -march=x86
+; PR2098
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin8"
+
+define void @foo(i32 %x) {
+entry:
+	%x_addr = alloca i32		; <i32*> [#uses=2]
+	%"alloca point" = bitcast i32 0 to i32		; <i32> [#uses=0]
+	store i32 %x, i32* %x_addr
+	%tmp = load i32* %x_addr, align 4		; <i32> [#uses=1]
+	%tmp1 = ashr i32 %tmp, -2		; <i32> [#uses=1]
+	%tmp2 = and i32 %tmp1, 1		; <i32> [#uses=1]
+	%tmp23 = trunc i32 %tmp2 to i8		; <i8> [#uses=1]
+	%toBool = icmp ne i8 %tmp23, 0		; <i1> [#uses=1]
+	br i1 %toBool, label %bb, label %bb5
+
+bb:		; preds = %entry
+	%tmp4 = call i32 (...)* @bar( ) nounwind 		; <i32> [#uses=0]
+	br label %bb5
+
+bb5:		; preds = %bb, %entry
+	br label %return
+
+return:		; preds = %bb5
+	ret void
+}
+
+declare i32 @bar(...)