[llvm-commits] [llvm] r47128 - in /llvm/trunk: lib/CodeGen/SelectionDAG/SelectionDAG.cpp test/CodeGen/X86/2008-02-14-BitMiscompile.ll

[Chris Lattner]

Author: lattner
Date: Thu Feb 14 12:48:56 2008
New Revision: 47128

URL: http://llvm.org/viewvc/llvm-project?rev=47128&view=rev
Log:
Fix a miscompilation from Dan's recent apintification.

Added:
    llvm/trunk/test/CodeGen/X86/2008-02-14-BitMiscompile.ll
Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=47128&r1=47127&r2=47128&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Thu Feb 14 12:48:56 2008
@@ -1437,12 +1437,10 @@
     // We know that the top bits of C-X are clear if X contains less bits
     // than C (i.e. no wrap-around can happen).  For example, 20-X is
     // positive if we can prove that X is >= 0 and < 16.
-
-    // sign bit clear
     if (CLHS->getAPIntValue().isNonNegative()) {
       unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
       // NLZ can't be BitWidth with no sign bit
-      APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ);
+      APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
       ComputeMaskedBits(Op.getOperand(1), MaskV, KnownZero, KnownOne, Depth+1);
 
       // If all of the MaskV bits are known to be zero, then we know the output

Added: llvm/trunk/test/CodeGen/X86/2008-02-14-BitMiscompile.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-02-14-BitMiscompile.ll?rev=47128&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-02-14-BitMiscompile.ll (added)
+++ llvm/trunk/test/CodeGen/X86/2008-02-14-BitMiscompile.ll Thu Feb 14 12:48:56 2008
@@ -0,0 +1,8 @@
+; RUN: llvm-as < %s | llc -march=x86 | grep and
+define i32 @test(i1 %A) {
+	%B = zext i1 %A to i32		; <i32> [#uses=1]
+	%C = sub i32 0, %B		; <i32> [#uses=1]
+	%D = and i32 %C, 255		; <i32> [#uses=1]
+	ret i32 %D
+}
+