[llvm-commits] [llvm] r45022 - in /llvm/trunk: include/llvm/Target/TargetInstrInfo.h lib/Target/Target.td utils/TableGen/CodeGenInstruction.h utils/TableGen/CodeGenTarget.cpp utils/TableGen/InstrInfoEmitter.cpp

[Christopher Lamb]

On Dec 14, 2007, at 10:40 AM, Bill Wendling wrote:

> Hi Duncan,
>
>> Hi Bill, does a branch instruction have side-effects?
>
> Yes.
>
>> What is a side-effect? I noticed some confusion in gcc about
>> the definition of a side-effect, so it would be good to avoid
>> confusion in LLVM.
>>
> My understanding of a side effect is when an instruction has
> un-modeled effects. For instance, "emms" on X86 has side effects that
> aren't modeled in the instruction pattern  -- it resets the FP
> registers after MMX use. Other instructions have no un-modeled side
> effects -- e.g., "xor" on X86 or "li" on PPC. Others may have
> un-modeled side effects in some situations, but not in others -- e.g.,
> loads, in general, have side effects (accessing memory), but loads
> from a constant pool don't.
>
> This is the working definition, anyway. In the beginning, it'll be
> closely tied to what the "isRematerializable" flag means. I don't know
> what GCC considers side effects. Could you give a summary? It would be
> good to contrast/compare with it.


In processor design discussions all load instructions were termed  
"side affecting", as they could cause a page fault. Perhaps the key  
here is whether the un-modeled effects of the instruction affect  
correct program behavior?

--
Christopher Lamb



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