[llvm-commits] [llvm] r44874 - /llvm/trunk/lib/CodeGen/MachineLICM.cpp

[Evan Cheng]

On Dec 11, 2007, at 11:40 AM, Bill Wendling <isanbard at gmail.com> wrote:

> Author: void
> Date: Tue Dec 11 13:40:06 2007
> New Revision: 44874
>
> URL: http://llvm.org/viewvc/llvm-project?rev=44874&view=rev
> Log:
> Blark! How in the world did this work without this?!

Is this just cosmetic changes? I am sure I see why this is better?  
Just curious.

One thing that is some what annoying to me is if LICM is after live  
variables then it won't need to compute vreg def info or liveness  
info. I wonder if it is possible to move the pass after live variables?

Evan

> Modified:
>    llvm/trunk/lib/CodeGen/MachineLICM.cpp
>
> Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=44874&r1=44873&r2=44874&view=diff
>
> === 
> === 
> === 
> =====================================================================
> --- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original)
> +++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Tue Dec 11 13:40:06 2007
> @@ -43,6 +43,8 @@
>
> namespace {
>   class VISIBILITY_HIDDEN MachineLICM : public MachineFunctionPass {
> +    MachineFunction      *CurMF;// Current MachineFunction
> +
>     // Various analyses that we use...
>     MachineLoopInfo      *LI;   // Current MachineLoopInfo
>     MachineDominatorTree *DT;   // Machine dominator tree for the  
> current Loop
> @@ -91,7 +93,7 @@
>     /// MapVirtualRegisterDefs - Create a map of which machine  
> instruction
>     /// defines a virtual register.
>     ///
> -    void MapVirtualRegisterDefs(const MachineFunction &MF);
> +    void MapVirtualRegisterDefs();
>
>     /// IsInSubLoop - A little predicate that returns true if the  
> specified
>     /// basic block is in a subloop of the current one, not the  
> current one
> @@ -182,12 +184,15 @@
>   if (!PerformLICM) return false; // For debugging.
>
>   Changed = false;
> -  TII = MF.getTarget().getInstrInfo();
> +  CurMF = &MF;
> +  TII = CurMF->getTarget().getInstrInfo();
>
>   // Get our Loop information...
>   LI = &getAnalysis<MachineLoopInfo>();
>   DT = &getAnalysis<MachineDominatorTree>();
>
> +  MapVirtualRegisterDefs();
> +
>   for (MachineLoopInfo::iterator
>          I = LI->begin(), E = LI->end(); I != E; ++I) {
>     MachineLoop *L = *I;
> @@ -205,9 +210,9 @@
> /// MapVirtualRegisterDefs - Create a map of which machine  
> instruction defines a
> /// virtual register.
> ///
> -void MachineLICM::MapVirtualRegisterDefs(const MachineFunction &MF) {
> +void MachineLICM::MapVirtualRegisterDefs() {
>   for (MachineFunction::const_iterator
> -         I = MF.begin(), E = MF.end(); I != E; ++I) {
> +         I = CurMF->begin(), E = CurMF->end(); I != E; ++I) {
>     const MachineBasicBlock &MBB = *I;
>
>     for (MachineBasicBlock::const_iterator
>
>
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