[llvm-commits] [llvm] r43339 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAGTypes.cpp

[Duncan Sands]

Author: baldrick
Date: Thu Oct 25 07:30:51 2007
New Revision: 43339

URL: http://llvm.org/viewvc/llvm-project?rev=43339&view=rev
Log:
Correctly extract the ValueType from a VTSDNode.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAGTypes.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAGTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAGTypes.cpp?rev=43339&r1=43338&r2=43339&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAGTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAGTypes.cpp Thu Oct 25 07:30:51 2007
@@ -903,7 +903,7 @@
 void DAGTypeLegalizer::
 ExpandResult_SIGN_EXTEND_INREG(SDNode *N, SDOperand &Lo, SDOperand &Hi) {
   GetExpandedOp(N->getOperand(0), Lo, Hi);
-  MVT::ValueType EVT = N->getOperand(1).getValueType();
+  MVT::ValueType EVT = cast<VTSDNode>(N->getOperand(1))->getVT();
 
   if (MVT::getSizeInBits(EVT) <= MVT::getSizeInBits(Lo.getValueType())) {
     // sext_inreg the low part if needed.