[llvm-commits] [llvm] r41158 - in /llvm/trunk/lib/Target/Mips: MipsISelDAGToDAG.cpp MipsISelLowering.cpp

Bruno Cardoso Lopes bruno.cardoso at gmail.com
Fri Aug 17 19:16:30 PDT 2007


Author: bruno
Date: Fri Aug 17 21:16:30 2007
New Revision: 41158

URL: http://llvm.org/viewvc/llvm-project?rev=41158&view=rev
Log:
Removed LowerRETURADDR, fixed small bug into LowerRET, LowerGlobalAddress
fixed to generate instructions (add, lui) glued!

Modified:
    llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp
    llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp

Modified: llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp?rev=41158&r1=41157&r2=41158&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp Fri Aug 17 21:16:30 2007
@@ -142,7 +142,7 @@
        Addr.getOpcode() == ISD::TargetGlobalAddress))
     return false;
   
-  // Operand is an result from an ADD.
+  // Operand is a result from an ADD.
   if (Addr.getOpcode() == ISD::ADD) 
   {
     if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Addr.getOperand(1))) 

Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp?rev=41158&r1=41157&r2=41158&view=diff

==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Fri Aug 17 21:16:30 2007
@@ -42,6 +42,7 @@
     case MipsISD::Hi        : return "MipsISD::Hi";
     case MipsISD::Lo        : return "MipsISD::Lo";
     case MipsISD::Ret       : return "MipsISD::Ret";
+    case MipsISD::Add       : return "MipsISD::Add";
     default                 : return NULL;
   }
 }
@@ -119,7 +120,6 @@
     case ISD::RET:              return LowerRET(Op, DAG);
     case ISD::GlobalAddress:    return LowerGlobalAddress(Op, DAG);
     case ISD::GlobalTLSAddress: return LowerGlobalTLSAddress(Op, DAG);
-    case ISD::RETURNADDR:       return LowerRETURNADDR(Op, DAG);
   }
   return SDOperand();
 }
@@ -140,17 +140,6 @@
   return VReg;
 }
 
-// Set up a frame object for the return address.
-//SDOperand MipsTargetLowering::getReturnAddressFrameIndex(SelectionDAG &DAG) {
-//  if (ReturnAddrIndex == 0) {
-//    MachineFunction &MF = DAG.getMachineFunction();
-//    ReturnAddrIndex = MF.getFrameInfo()->CreateFixedObject(4, 0);
-//  }
-//
-//  return DAG.getFrameIndex(ReturnAddrIndex, getPointerTy());
-//}
-
-
 //===----------------------------------------------------------------------===//
 //  Misc Lower Operation implementation
 //===----------------------------------------------------------------------===//
@@ -160,10 +149,15 @@
   GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal();
 
   SDOperand GA = DAG.getTargetGlobalAddress(GV, MVT::i32);
-  SDOperand Hi = DAG.getNode(MipsISD::Hi, MVT::i32, GA);
+
+  const MVT::ValueType *VTs = DAG.getNodeValueTypes(MVT::i32, MVT::Flag);
+  SDOperand Ops[] = { GA };
+
+  SDOperand Hi = DAG.getNode(MipsISD::Hi, VTs, 2, Ops, 1);
   SDOperand Lo = DAG.getNode(MipsISD::Lo, MVT::i32, GA);
 
-  return DAG.getNode(ISD::ADD, MVT::i32, Lo, Hi);
+  SDOperand InFlag = Hi.getValue(1);
+  return DAG.getNode(MipsISD::Add, MVT::i32, Lo, Hi, InFlag);
 }
 
 SDOperand MipsTargetLowering::
@@ -370,8 +364,8 @@
   SmallVector<SDOperand, 8> ResultVals;
 
   // Returns void
-  if (!RVLocs.size())
-    return Chain.Val;
+  //if (!RVLocs.size())
+  //  return Chain.Val;
 
   // Copy all of the result registers out of their specified physreg.
   for (unsigned i = 0; i != RVLocs.size(); ++i) {





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