[llvm-commits] [llvm] r40520 - in /llvm/trunk: include/llvm/CodeGen/ScheduleDAG.h lib/CodeGen/SelectionDAG/ScheduleDAG.cpp

[Evan Cheng]

On Jul 26, 2007, at 1:12 AM, Christopher Lamb wrote:

>  /// EmitNode - Generate machine code for an node and needed  
> dependencies.
>  ///
>  void ScheduleDAG::EmitNode(SDNode *Node,
> @@ -436,6 +578,14 @@
>    // If machine instruction
>    if (Node->isTargetOpcode()) {
>      unsigned Opc = Node->getTargetOpcode();
> +
> +    // Handle subreg insert/extract specially
> +    if (Opc == TargetInstrInfo::EXTRACT_SUBREG ||
> +        Opc == TargetInstrInfo::INSERT_SUBREG) {
> +      EmitSubregNode(Node, VRBaseMap);
> +      return;
> +    }
> +

Hi Chris,

Is this right? EXTRACT_SUBREG and INSERT_SUBREG are not target opcodes.

Evan
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