[llvm-commits] [llvm] r40480 - in /llvm/trunk: include/llvm/CodeGen/SelectionDAGISel.h lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp lib/Target/X86/X86ISelDAGToDAG.cpp

[Dan Gohman]

Author: djg
Date: Tue Jul 24 18:00:27 2007
New Revision: 40480

URL: http://llvm.org/viewvc/llvm-project?rev=40480&view=rev
Log:
Add const to CanBeFoldedBy, CheckAndMask, and CheckOrMask.

Modified:
    llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
    llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp

Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h?rev=40480&r1=40479&r2=40480&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAGISel.h Tue Jul 24 18:00:27 2007
@@ -74,7 +74,9 @@
 
   /// CanBeFoldedBy - Returns true if the specific operand node N of U can be
   /// folded during instruction selection that starts at Root?
-  virtual bool CanBeFoldedBy(SDNode *N, SDNode *U, SDNode *Root) { return true;}
+  virtual bool CanBeFoldedBy(SDNode *N, SDNode *U, SDNode *Root) const {
+    return true;
+  }
   
   /// CreateTargetHazardRecognizer - Return a newly allocated hazard recognizer
   /// to use for this target when scheduling the DAG.
@@ -164,8 +166,10 @@
                                      SelectionDAG &DAG);
 
   // Calls to these predicates are generated by tblgen.
-  bool CheckAndMask(SDOperand LHS, ConstantSDNode *RHS, int64_t DesiredMaskS);  
-  bool CheckOrMask(SDOperand LHS, ConstantSDNode *RHS, int64_t DesiredMaskS);  
+  bool CheckAndMask(SDOperand LHS, ConstantSDNode *RHS,
+                    int64_t DesiredMaskS) const;
+  bool CheckOrMask(SDOperand LHS, ConstantSDNode *RHS,
+                    int64_t DesiredMaskS) const;
   
 private:
   void SelectBasicBlock(BasicBlock *BB, MachineFunction &MF,

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=40480&r1=40479&r2=40480&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Tue Jul 24 18:00:27 2007
@@ -4799,7 +4799,7 @@
 /// actual value in the DAG on the RHS of an AND, and DesiredMaskS is the value
 /// specified in the .td file (e.g. 255).
 bool SelectionDAGISel::CheckAndMask(SDOperand LHS, ConstantSDNode *RHS, 
-                                    int64_t DesiredMaskS) {
+                                    int64_t DesiredMaskS) const {
   uint64_t ActualMask = RHS->getValue();
   uint64_t DesiredMask =DesiredMaskS & MVT::getIntVTBitMask(LHS.getValueType());
   
@@ -4828,7 +4828,7 @@
 /// actual value in the DAG on the RHS of an OR, and DesiredMaskS is the value
 /// specified in the .td file (e.g. 255).
 bool SelectionDAGISel::CheckOrMask(SDOperand LHS, ConstantSDNode *RHS, 
-                                    int64_t DesiredMaskS) {
+                                    int64_t DesiredMaskS) const {
   uint64_t ActualMask = RHS->getValue();
   uint64_t DesiredMask =DesiredMaskS & MVT::getIntVTBitMask(LHS.getValueType());
   

Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=40480&r1=40479&r2=40480&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Tue Jul 24 18:00:27 2007
@@ -132,7 +132,7 @@
 
     virtual void EmitFunctionEntryCode(Function &Fn, MachineFunction &MF);
 
-    virtual bool CanBeFoldedBy(SDNode *N, SDNode *U, SDNode *Root);
+    virtual bool CanBeFoldedBy(SDNode *N, SDNode *U, SDNode *Root) const;
 
 // Include the pieces autogenerated from the target description.
 #include "X86GenDAGISel.inc"
@@ -272,7 +272,7 @@
 }
 
 
-bool X86DAGToDAGISel::CanBeFoldedBy(SDNode *N, SDNode *U, SDNode *Root) {
+bool X86DAGToDAGISel::CanBeFoldedBy(SDNode *N, SDNode *U, SDNode *Root) const {
   if (FastISel) return false;
 
   // If U use can somehow reach N through another path then U can't fold N or