[llvm-commits] [llvm] r40101 - in /llvm/trunk/test/CodeGen/X86: sse-align-10.ll sse-align-5.ll sse-align-6.ll sse-align-7.ll sse-align-8.ll vec_call.ll

[Dan Gohman]

Author: djg
Date: Fri Jul 20 11:31:26 2007
New Revision: 40101

URL: http://llvm.org/viewvc/llvm-project?rev=40101&view=rev
Log:
Update these regression tests to accomodate X86InstrSSE.td now using movups/movaps
for everything.

Modified:
    llvm/trunk/test/CodeGen/X86/sse-align-10.ll
    llvm/trunk/test/CodeGen/X86/sse-align-5.ll
    llvm/trunk/test/CodeGen/X86/sse-align-6.ll
    llvm/trunk/test/CodeGen/X86/sse-align-7.ll
    llvm/trunk/test/CodeGen/X86/sse-align-8.ll
    llvm/trunk/test/CodeGen/X86/vec_call.ll

Modified: llvm/trunk/test/CodeGen/X86/sse-align-10.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse-align-10.ll?rev=40101&r1=40100&r2=40101&view=diff

==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse-align-10.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse-align-10.ll Fri Jul 20 11:31:26 2007
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86-64 | grep movdqu | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=x86-64 | grep movups | wc -l | grep 1
 
 define <2 x i64> @bar(<2 x i64>* %p)
 {

Modified: llvm/trunk/test/CodeGen/X86/sse-align-5.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse-align-5.ll?rev=40101&r1=40100&r2=40101&view=diff

==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse-align-5.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse-align-5.ll Fri Jul 20 11:31:26 2007
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86-64 | grep movdqa | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=x86-64 | grep movaps | wc -l | grep 1
 
 define <2 x i64> @bar(<2 x i64>* %p)
 {

Modified: llvm/trunk/test/CodeGen/X86/sse-align-6.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse-align-6.ll?rev=40101&r1=40100&r2=40101&view=diff

==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse-align-6.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse-align-6.ll Fri Jul 20 11:31:26 2007
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86-64 | grep movdqu | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=x86-64 | grep movups | wc -l | grep 1
 
 define <2 x i64> @bar(<2 x i64>* %p, <2 x i64> %x)
 {

Modified: llvm/trunk/test/CodeGen/X86/sse-align-7.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse-align-7.ll?rev=40101&r1=40100&r2=40101&view=diff

==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse-align-7.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse-align-7.ll Fri Jul 20 11:31:26 2007
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86-64 | grep movdqa | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=x86-64 | grep movaps | wc -l | grep 1
 
 define void @bar(<2 x i64>* %p, <2 x i64> %x)
 {

Modified: llvm/trunk/test/CodeGen/X86/sse-align-8.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sse-align-8.ll?rev=40101&r1=40100&r2=40101&view=diff

==============================================================================
--- llvm/trunk/test/CodeGen/X86/sse-align-8.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sse-align-8.ll Fri Jul 20 11:31:26 2007
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86-64 | grep movdqu | wc -l | grep 1
+; RUN: llvm-as < %s | llc -march=x86-64 | grep movups | wc -l | grep 1
 
 define void @bar(<2 x i64>* %p, <2 x i64> %x)
 {

Modified: llvm/trunk/test/CodeGen/X86/vec_call.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_call.ll?rev=40101&r1=40100&r2=40101&view=diff

==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_call.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_call.ll Fri Jul 20 11:31:26 2007
@@ -1,7 +1,7 @@
 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin8 | \
 ; RUN:   grep {subl.*60}
 ; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin8 | \
-; RUN:   grep {movdqa.*32}
+; RUN:   grep {movaps.*32}
 
 void %test() {
 	tail call void %xx( int 1, int 2, int 3, int 4, int 5, int 6, int 7, <2 x long> cast (<4 x int> < int 4, int 3, int 2, int 1 > to <2 x long>), <2 x long> cast (<4 x int> < int 8, int 7, int 6, int 5 > to <2 x long>), <2 x long> cast (<4 x int> < int 6, int 4, int 2, int 0 > to <2 x long>), <2 x long> cast (<4 x int> < int 8, int 4, int 2, int 1 > to <2 x long>), <2 x long> cast (<4 x int> < int 0, int 1, int 3, int 9 > to <2 x long>) )