[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp X86ISelLowering.cpp X86ISelLowering.h

[Dan Gohman]

Changes in directory llvm/lib/Target/X86:

X86ISelDAGToDAG.cpp updated: 1.149 -> 1.150
X86ISelLowering.cpp updated: 1.413 -> 1.414
X86ISelLowering.h updated: 1.100 -> 1.101
---
Log message:

Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from
TargetLowering to SelectionDAG so that they have more convenient
access to the current DAG, in preparation for the ValueType routines
being changed from standalone functions to members of SelectionDAG for
the pre-legalize vector type changes.


---
Diffs of the changes:  (+3 -1)

 X86ISelDAGToDAG.cpp |    2 +-
 X86ISelLowering.cpp |    1 +
 X86ISelLowering.h   |    1 +
 3 files changed, 3 insertions(+), 1 deletion(-)


Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
diff -u llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.149 llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.150
--- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.149	Wed Apr 11 17:29:46 2007
+++ llvm/lib/Target/X86/X86ISelDAGToDAG.cpp	Fri Jun 22 09:59:07 2007
@@ -744,7 +744,7 @@
             // On x86-64, the resultant disp must fit in 32-bits.
             isInt32(AM.Disp + CN->getSignExtended()) &&
             // Check to see if the LHS & C is zero.
-            TLI.MaskedValueIsZero(N.getOperand(0), CN->getValue())) {
+            CurDAG->MaskedValueIsZero(N.getOperand(0), CN->getValue())) {
           AM.Disp += CN->getValue();
           return false;
         }


Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.413 llvm/lib/Target/X86/X86ISelLowering.cpp:1.414
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.413	Mon Jun 18 19:13:10 2007
+++ llvm/lib/Target/X86/X86ISelLowering.cpp	Fri Jun 22 09:59:07 2007
@@ -4506,6 +4506,7 @@
                                                        uint64_t Mask,
                                                        uint64_t &KnownZero,
                                                        uint64_t &KnownOne,
+                                                       const SelectionDAG &DAG,
                                                        unsigned Depth) const {
   unsigned Opc = Op.getOpcode();
   assert((Opc >= ISD::BUILTIN_OP_END ||


Index: llvm/lib/Target/X86/X86ISelLowering.h
diff -u llvm/lib/Target/X86/X86ISelLowering.h:1.100 llvm/lib/Target/X86/X86ISelLowering.h:1.101
--- llvm/lib/Target/X86/X86ISelLowering.h:1.100	Tue Apr 24 16:16:55 2007
+++ llvm/lib/Target/X86/X86ISelLowering.h	Fri Jun 22 09:59:07 2007
@@ -319,6 +319,7 @@
                                                 uint64_t Mask,
                                                 uint64_t &KnownZero, 
                                                 uint64_t &KnownOne,
+                                                const SelectionDAG &DAG,
                                                 unsigned Depth = 0) const;
     
     SDOperand getReturnAddressFrameIndex(SelectionDAG &DAG);