[llvm-commits] CVS: llvm/lib/CodeGen/LiveIntervalAnalysis.cpp VirtRegMap.cpp

[Dan Gohman]

> Is this necessary? ARM is already doing this by marking trivially re-
> materializable instructions with let isReMaterializable = 1.

It's not necessary, but it seems cleaner :-).

In the ARM target, other than instructions that are always trivially
rematerialiable, there's only LDR, with a ReMaterializable clone named LDRcp.
x86 has a variety of load instructions, so in order to work the way ARM does
x86 would need a varity of clones, and then the clones wouldn't be able to
use the automatic instruction selection, so there would still need to be some
new custom logic for picking which clone to use for each constant.

Dan