[llvm-commits] CVS: llvm/lib/Target/ARM/ARMInstrInfo.h ARMInstrInfo.cpp

Evan Cheng evan.cheng at apple.com
Thu May 17 17:18:35 PDT 2007



Changes in directory llvm/lib/Target/ARM:

ARMInstrInfo.h updated: 1.10 -> 1.11
ARMInstrInfo.cpp updated: 1.27 -> 1.28
---
Log message:

RemoveBranch() and InsertBranch() now returns number of instructions deleted / inserted.

---
Diffs of the changes:  (+13 -11)

 ARMInstrInfo.cpp |   16 +++++++++-------
 ARMInstrInfo.h   |    8 ++++----
 2 files changed, 13 insertions(+), 11 deletions(-)


Index: llvm/lib/Target/ARM/ARMInstrInfo.h
diff -u llvm/lib/Target/ARM/ARMInstrInfo.h:1.10 llvm/lib/Target/ARM/ARMInstrInfo.h:1.11
--- llvm/lib/Target/ARM/ARMInstrInfo.h:1.10	Wed May 16 16:53:07 2007
+++ llvm/lib/Target/ARM/ARMInstrInfo.h	Thu May 17 19:18:17 2007
@@ -96,10 +96,10 @@
   virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
                              MachineBasicBlock *&FBB,
                              std::vector<MachineOperand> &Cond) const;
-  virtual void RemoveBranch(MachineBasicBlock &MBB) const;
-  virtual void InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
-                            MachineBasicBlock *FBB,
-                            const std::vector<MachineOperand> &Cond) const;
+  virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const;
+  virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
+                                MachineBasicBlock *FBB,
+                                const std::vector<MachineOperand> &Cond) const;
   virtual bool BlockHasNoFallThrough(MachineBasicBlock &MBB) const;
   virtual bool ReverseBranchCondition(std::vector<MachineOperand> &Cond) const;
 


Index: llvm/lib/Target/ARM/ARMInstrInfo.cpp
diff -u llvm/lib/Target/ARM/ARMInstrInfo.cpp:1.27 llvm/lib/Target/ARM/ARMInstrInfo.cpp:1.28
--- llvm/lib/Target/ARM/ARMInstrInfo.cpp:1.27	Wed May 16 16:53:07 2007
+++ llvm/lib/Target/ARM/ARMInstrInfo.cpp	Thu May 17 19:18:17 2007
@@ -349,33 +349,34 @@
 }
 
 
-void ARMInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
+unsigned ARMInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
   MachineFunction &MF = *MBB.getParent();
   ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
   int BOpc   = AFI->isThumbFunction() ? ARM::tB : ARM::B;
   int BccOpc = AFI->isThumbFunction() ? ARM::tBcc : ARM::Bcc;
 
   MachineBasicBlock::iterator I = MBB.end();
-  if (I == MBB.begin()) return;
+  if (I == MBB.begin()) return 0;
   --I;
   if (I->getOpcode() != BOpc && I->getOpcode() != BccOpc)
-    return;
+    return 0;
   
   // Remove the branch.
   I->eraseFromParent();
   
   I = MBB.end();
   
-  if (I == MBB.begin()) return;
+  if (I == MBB.begin()) return 1;
   --I;
   if (I->getOpcode() != BccOpc)
-    return;
+    return 1;
   
   // Remove the branch.
   I->eraseFromParent();
+  return 2;
 }
 
-void ARMInstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
+unsigned ARMInstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
                                 MachineBasicBlock *FBB,
                                 const std::vector<MachineOperand> &Cond) const {
   MachineFunction &MF = *MBB.getParent();
@@ -393,12 +394,13 @@
       BuildMI(&MBB, get(BOpc)).addMBB(TBB);
     else
       BuildMI(&MBB, get(BccOpc)).addMBB(TBB).addImm(Cond[0].getImm());
-    return;
+    return 1;
   }
   
   // Two-way conditional branch.
   BuildMI(&MBB, get(BccOpc)).addMBB(TBB).addImm(Cond[0].getImm());
   BuildMI(&MBB, get(BOpc)).addMBB(FBB);
+  return 2;
 }
 
 bool ARMInstrInfo::BlockHasNoFallThrough(MachineBasicBlock &MBB) const {






More information about the llvm-commits mailing list