[llvm-commits] CVS: llvm/utils/TableGen/RegisterInfoEmitter.cpp

[Chris Lattner]

On May 1, 2007, at 1:28 PM, Nate Begeman wrote:

>> I believe that sub/super register generator unions the set of sub/
>> super registers in a deterministic fashion and produces the
>> necessary tables in the RegisterInfo.inc already. The only thing is
>> that this would make the sub register index implicit in the
>> ordering of the sub register list in the RegisterInfo.td.
>
> I'm not sure things are sufficiently well ordered internally for
> that, or sorted in any particular fashion.  I'll look into it, but it
> seems like it would be less flexible and make the td files far less
> intuitive as to what is actually going on.  If tablegen picked the
> numbering, I would have to go read the generated file to know what to
> write in the ISel for that backend, which seems backwards to me.

I agree with both of you.  We should have the subreg number in  
the .td file, but we should merge this with the existing subreg stuff  
if possible.  One simple thing would be for nates new syntax to  
populate the old tables, making the old syntax unneeded?

-Chris