[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCInstrInfo.cpp

[Evan Cheng]

Changes in directory llvm/lib/Target/PowerPC:

PPCInstrInfo.cpp updated: 1.36 -> 1.37
---
Log message:

Relex assertions to account for additional implicit def / use operands.

---
Diffs of the changes:  (+5 -5)

 PPCInstrInfo.cpp |   10 +++++-----
 1 files changed, 5 insertions(+), 5 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
diff -u llvm/lib/Target/PowerPC/PPCInstrInfo.cpp:1.36 llvm/lib/Target/PowerPC/PPCInstrInfo.cpp:1.37
--- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp:1.36	Thu Dec  7 16:21:48 2006
+++ llvm/lib/Target/PowerPC/PPCInstrInfo.cpp	Wed Apr 25 02:12:14 2007
@@ -38,7 +38,7 @@
   MachineOpCode oc = MI.getOpcode();
   if (oc == PPC::OR || oc == PPC::OR8 || oc == PPC::VOR ||
       oc == PPC::OR4To8 || oc == PPC::OR8To4) {                // or r1, r2, r2
-    assert(MI.getNumOperands() == 3 &&
+    assert(MI.getNumOperands() >= 3 &&
            MI.getOperand(0).isRegister() &&
            MI.getOperand(1).isRegister() &&
            MI.getOperand(2).isRegister() &&
@@ -49,7 +49,7 @@
       return true;
     }
   } else if (oc == PPC::ADDI) {             // addi r1, r2, 0
-    assert(MI.getNumOperands() == 3 &&
+    assert(MI.getNumOperands() >= 3 &&
            MI.getOperand(0).isRegister() &&
            MI.getOperand(2).isImmediate() &&
            "invalid PPC ADDI instruction!");
@@ -59,7 +59,7 @@
       return true;
     }
   } else if (oc == PPC::ORI) {             // ori r1, r2, 0
-    assert(MI.getNumOperands() == 3 &&
+    assert(MI.getNumOperands() >= 3 &&
            MI.getOperand(0).isRegister() &&
            MI.getOperand(1).isRegister() &&
            MI.getOperand(2).isImmediate() &&
@@ -71,7 +71,7 @@
     }
   } else if (oc == PPC::FMRS || oc == PPC::FMRD ||
              oc == PPC::FMRSD) {      // fmr r1, r2
-    assert(MI.getNumOperands() == 2 &&
+    assert(MI.getNumOperands() >= 2 &&
            MI.getOperand(0).isRegister() &&
            MI.getOperand(1).isRegister() &&
            "invalid PPC FMR instruction");
@@ -79,7 +79,7 @@
     destReg = MI.getOperand(0).getReg();
     return true;
   } else if (oc == PPC::MCRF) {             // mcrf cr1, cr2
-    assert(MI.getNumOperands() == 2 &&
+    assert(MI.getNumOperands() >= 2 &&
            MI.getOperand(0).isRegister() &&
            MI.getOperand(1).isRegister() &&
            "invalid PPC MCRF instruction");