[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

[Reid Spencer]

On Wed, 2007-04-04 at 18:06 -0700, Chris Lattner wrote:
> On Apr 4, 2007, at 5:54 PM, Reid Spencer wrote:
> 
> > On Wed, 2007-04-04 at 17:37 -0700, Chris Lattner wrote:
> >>> Implement the llvm.bit.part_select.iN.iN.iN overloaded intrinsic.
> >>
> >> Urr?  This is obviously incorrect.  I'd much rather have the code
> >> generator assert and die on an unsupported intrinsic than to
> >> miscompile it silently.
> >
> > Okay, but you DID approve this in the plan.
> 
> I did not approve silently miscompiling the code.

You most certainly did. You agreed with the plan and it stated:

I will *not* write lowering code for part_select in the SDISel
because no known target can do anything with it and it expands
to an entire function. If, at some point, it needs to be
implemented on the "normal" targets, we can do so at that time.

*****To avoid having SDISel assert out, I will have this intrinsic
simply generate a 0 for now.*****

This is mostly a time saving thing
for right now. I will probably revisit after AutoESL's Phase 3
is over so we don't leave a rare but bad code gen bug in LLVM.

> 
> I'm fine with it aborting if you don't want to implement the lowering
> code.

As you'd rather have an abort, I'll change it.

> 
> -Chris
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