[llvm-commits] CVS: llvm/lib/Target/ARM/ARMISelLowering.cpp ARMISelLowering.h ARMInstrInfo.td ARMInstrThumb.td

Lauro Ramos Venancio lauro.venancio at gmail.com
Sun Apr 1 18:30:25 PDT 2007



Changes in directory llvm/lib/Target/ARM:

ARMISelLowering.cpp updated: 1.34 -> 1.35
ARMISelLowering.h updated: 1.10 -> 1.11
ARMInstrInfo.td updated: 1.94 -> 1.95
ARMInstrThumb.td updated: 1.20 -> 1.21
---
Log message:

- Divides the comparisons in two types: comparisons that only use N and Z 
flags (ARMISD::CMPNZ) and comparisons that use all flags (ARMISD::CMP).
- Defines the instructions: TST, TEQ (ARM) and TST (Thumb).


---
Diffs of the changes:  (+45 -7)

 ARMISelLowering.cpp |   16 +++++++++++++++-
 ARMISelLowering.h   |    1 +
 ARMInstrInfo.td     |   16 ++++++++++++----
 ARMInstrThumb.td    |   19 +++++++++++++++++--
 4 files changed, 45 insertions(+), 7 deletions(-)


Index: llvm/lib/Target/ARM/ARMISelLowering.cpp
diff -u llvm/lib/Target/ARM/ARMISelLowering.cpp:1.34 llvm/lib/Target/ARM/ARMISelLowering.cpp:1.35
--- llvm/lib/Target/ARM/ARMISelLowering.cpp:1.34	Sun Apr  1 03:06:46 2007
+++ llvm/lib/Target/ARM/ARMISelLowering.cpp	Sun Apr  1 20:30:03 2007
@@ -266,6 +266,7 @@
   case ARMISD::RET_FLAG:      return "ARMISD::RET_FLAG";
   case ARMISD::PIC_ADD:       return "ARMISD::PIC_ADD";
   case ARMISD::CMP:           return "ARMISD::CMP";
+  case ARMISD::CMPNZ:         return "ARMISD::CMPNZ";
   case ARMISD::CMPFP:         return "ARMISD::CMPFP";
   case ARMISD::CMPFPw0:       return "ARMISD::CMPFPw0";
   case ARMISD::FMSTAT:        return "ARMISD::FMSTAT";
@@ -946,8 +947,21 @@
   }
 
   ARMCC::CondCodes CondCode = IntCCToARMCC(CC);
+  ARMISD::NodeType CompareType;
+  switch (CondCode) {
+  default:
+    CompareType = ARMISD::CMP;
+    break;
+  case ARMCC::EQ:
+  case ARMCC::NE:
+  case ARMCC::MI:
+  case ARMCC::PL:
+    // Uses only N and Z Flags
+    CompareType = ARMISD::CMPNZ;
+    break;
+  }
   ARMCC = DAG.getConstant(CondCode, MVT::i32);
-  return DAG.getNode(ARMISD::CMP, MVT::Flag, LHS, RHS);
+  return DAG.getNode(CompareType, MVT::Flag, LHS, RHS);
 }
 
 /// Returns a appropriate VFP CMP (fcmp{s|d}+fmstat) for the given operands.


Index: llvm/lib/Target/ARM/ARMISelLowering.h
diff -u llvm/lib/Target/ARM/ARMISelLowering.h:1.10 llvm/lib/Target/ARM/ARMISelLowering.h:1.11
--- llvm/lib/Target/ARM/ARMISelLowering.h:1.10	Fri Mar 30 18:15:24 2007
+++ llvm/lib/Target/ARM/ARMISelLowering.h	Sun Apr  1 20:30:03 2007
@@ -43,6 +43,7 @@
       PIC_ADD,      // Add with a PC operand and a PIC label.
 
       CMP,          // ARM compare instructions.
+      CMPNZ,        // ARM compare that uses only N or Z flags.
       CMPFP,        // ARM VFP compare instruction, sets FPSCR.
       CMPFPw0,      // ARM VFP compare against zero instruction, sets FPSCR.
       FMSTAT,       // ARM fmstat instruction.


Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Target/ARM/ARMInstrInfo.td:1.94 llvm/lib/Target/ARM/ARMInstrInfo.td:1.95
--- llvm/lib/Target/ARM/ARMInstrInfo.td:1.94	Tue Mar 27 11:19:21 2007
+++ llvm/lib/Target/ARM/ARMInstrInfo.td	Sun Apr  1 20:30:03 2007
@@ -70,6 +70,9 @@
 def ARMcmp           : SDNode<"ARMISD::CMP", SDT_ARMCmp,
                               [SDNPOutFlag]>;
 
+def ARMcmpNZ         : SDNode<"ARMISD::CMPNZ", SDT_ARMCmp,
+                              [SDNPOutFlag]>;
+
 def ARMpic_add       : SDNode<"ARMISD::PIC_ADD", SDT_ARMPICAdd>;
 
 def ARMsrl_flag      : SDNode<"ARMISD::SRL_FLAG", SDTIntUnaryOp, [SDNPOutFlag]>;
@@ -1023,10 +1026,15 @@
              (CMNri  GPR:$src, so_imm_neg:$imm)>;
 
 // Note that TST/TEQ don't set all the same flags that CMP does!
-def TSTrr : AI1<(ops GPR:$a, so_reg:$b), "tst $a, $b", []>;
-def TSTri : AI1<(ops GPR:$a, so_imm:$b), "tst $a, $b", []>;
-def TEQrr : AI1<(ops GPR:$a, so_reg:$b), "teq $a, $b", []>;
-def TEQri : AI1<(ops GPR:$a, so_imm:$b), "teq $a, $b", []>;
+defm TST  : AI1_bin0_irs<"tst", BinOpFrag<(ARMcmpNZ (and node:$LHS, node:$RHS), 0)>>;
+defm TEQ  : AI1_bin0_irs<"teq", BinOpFrag<(ARMcmpNZ (xor node:$LHS, node:$RHS), 0)>>;
+
+defm CMPnz : AI1_bin0_irs<"cmp", BinOpFrag<(ARMcmpNZ node:$LHS, node:$RHS)>>;
+defm CMNnz : AI1_bin0_irs<"cmn", BinOpFrag<(ARMcmpNZ node:$LHS,(ineg node:$RHS))>>;
+
+def : ARMPat<(ARMcmpNZ GPR:$src, so_imm_neg:$imm),
+             (CMNri  GPR:$src, so_imm_neg:$imm)>;
+
 
 // Conditional moves
 def MOVCCr : AI<(ops GPR:$dst, GPR:$false, GPR:$true, CCOp:$cc),


Index: llvm/lib/Target/ARM/ARMInstrThumb.td
diff -u llvm/lib/Target/ARM/ARMInstrThumb.td:1.20 llvm/lib/Target/ARM/ARMInstrThumb.td:1.21
--- llvm/lib/Target/ARM/ARMInstrThumb.td:1.20	Thu Mar 29 16:38:31 2007
+++ llvm/lib/Target/ARM/ARMInstrThumb.td	Sun Apr  1 20:30:03 2007
@@ -356,7 +356,23 @@
 def tCMPr : TI<(ops GPR:$lhs, GPR:$rhs),
                "cmp $lhs, $rhs",
                [(ARMcmp GPR:$lhs, GPR:$rhs)]>;
-               
+
+def tTST  : TI<(ops GPR:$lhs, GPR:$rhs),
+               "tst $lhs, $rhs",
+               [(ARMcmpNZ (and GPR:$lhs, GPR:$rhs), 0)]>;
+
+def tCMNNZ : TI<(ops GPR:$lhs, GPR:$rhs),
+                "cmn $lhs, $rhs",
+                [(ARMcmpNZ GPR:$lhs, (ineg GPR:$rhs))]>;
+
+def tCMPNZi8 : TI<(ops GPR:$lhs, i32imm:$rhs),
+                 "cmp $lhs, $rhs",
+                 [(ARMcmpNZ GPR:$lhs, imm0_255:$rhs)]>;
+
+def tCMPNZr : TI<(ops GPR:$lhs, GPR:$rhs),
+                 "cmp $lhs, $rhs",
+                 [(ARMcmpNZ GPR:$lhs, GPR:$rhs)]>;
+
 // TODO: A7-37: CMP(3) - cmp hi regs
 
 def tEOR : TIt<(ops GPR:$dst, GPR:$lhs, GPR:$rhs),
@@ -472,7 +488,6 @@
                 [(set GPR:$dst, (sext_inreg GPR:$src, i16))]>,
                 Requires<[IsThumb, HasV6]>;
 
-// TODO: A7-122: TST - test.
 
 def tUXTB  : TI<(ops GPR:$dst, GPR:$src),
                 "uxtb $dst, $src",






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