[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

[Chris Lattner]

>      // FIXME: Distinguish between a formal with no [sz]ext  
> attribute from one
>      // that is zero extended!
>      if (FTy->paramHasAttr(j, FunctionType::ZExtAttribute))
> -      Flags |= 0;
> +      Flags &= ~(SDISelParamFlags::Signed);

this should set the zext bit.

>      case Promote:
>        if (MVT::isInteger(VT)) {
> -        unsigned ExtOp = isSigned ? ISD::SIGN_EXTEND :  
> ISD::ZERO_EXTEND;
> +        unsigned ExtOp = Args[i].isSigned ? ISD::SIGN_EXTEND :  
> ISD::ZERO_EXTEND;
>          Op = DAG.getNode(ExtOp, getTypeToTransformTo(VT), Op);
>        } else {
>          assert(MVT::isFloatingPoint(VT) && "Not int or FP?");

This should use ZERO_EXTEND if zext, SIGN_EXTEND if sext, and  
ANY_EXTEND if neither,

-Chris