[llvm-commits] llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp

[Nicolas Geoffray]

Chris Lattner wrote:
>
>> Because R31 is not used as a callee saved register when 
>> llvm::NoFramePointerElim is set to 1.
>
> NoFramePointerElim doesn't change the ABI, only the codegen model.

Yes it doesn't change the ABI, but R31's offset in Linux/ELF is in the 
callee saved area. In Macho it is not.

>
>> The algorithm
>> that calculates the callee saved registers' addresses does not save 
>> R31's offset when used as a frame pointer.
>> And with the ELF Abi, R31's offset is in the callee saved registers 
>> area. Therefore I have to force its allocation
>> (at the -4 offset).
>
> Please see how the LR register forces spilling to a specific stack slot.
>

You're talking about this code right?
  MachineLocation LRDst(MachineLocation::VirtualFP, LROffset);
  MachineLocation LRSrc(IsPPC64 ? PPC::LR8 : PPC::LR);
  Moves.push_back(MachineMove(FrameLabelId, LRDst, LRSrc));

However this is not enough for R31 because R31's offset is in the callee 
saved area. And if I don't add the code of this patch,
the algorithm that calculates callee saved addresses does not take into 
account the fact that R31 is in the callee saved area.

Btw, I'm just reproducing the code of  LowerDYNAMIC_STACKALLOC 
(PPCISelLowering.cpp). As the compilation may not go
through this method, I have to do the saving of R31's offset before the 
callee saved scan.

Nicolas