[llvm-commits] CVS: llvm/include/llvm/Target/MRegisterInfo.h

Reid Spencer reid at x10sys.com
Sun Feb 18 19:20:41 PST 2007



Changes in directory llvm/include/llvm/Target:

MRegisterInfo.h updated: 1.92 -> 1.93
---
Log message:

For PR1207: http://llvm.org/PR1207 :
Revert patches that caused the problem. Evan, please investigate and reapply
when you've discovered the problem.


---
Diffs of the changes:  (+0 -17)

 MRegisterInfo.h |   17 -----------------
 1 files changed, 17 deletions(-)


Index: llvm/include/llvm/Target/MRegisterInfo.h
diff -u llvm/include/llvm/Target/MRegisterInfo.h:1.92 llvm/include/llvm/Target/MRegisterInfo.h:1.93
--- llvm/include/llvm/Target/MRegisterInfo.h:1.92	Sat Feb 17 05:04:35 2007
+++ llvm/include/llvm/Target/MRegisterInfo.h	Sun Feb 18 21:20:00 2007
@@ -284,17 +284,6 @@
     return false;
   }
 
-  /// regsOverlap - Returns true if the two registers are equal or alias
-  /// each other. The registers may be virtual register.
-  bool regsOverlap(unsigned regA, unsigned regB) const {
-    if (regA == regB)
-      return true;
-
-    if (isVirtualRegister(regA) || isVirtualRegister(regB))
-      return false;
-    return areAliases(regA, regB);
-  }
-
   /// getCalleeSavedRegs - Return a null-terminated list of all of the
   /// callee saved registers on this target. The register should be in the
   /// order of desired callee-save stack frame offset. The first register is
@@ -306,12 +295,6 @@
   /// length of this list match the getCalleeSaveRegs() list.
   virtual const TargetRegisterClass* const *getCalleeSavedRegClasses() const =0;
 
-  /// getReservedRegs - Returns a bitset indexed by physical register number
-  /// indicating if a register is a special register that has particular uses and
-  /// should be considered unavailable at all times, e.g. SP, RA. This is used by
-  /// register scavenger to determine what registers are free.
-  virtual BitVector getReservedRegs(const MachineFunction &MF) const = 0;
-
   //===--------------------------------------------------------------------===//
   // Register Class Information
   //






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