[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp LegalizeDAG.cpp

[Nate Begeman]

Changes in directory llvm/lib/CodeGen/SelectionDAG:

DAGCombiner.cpp updated: 1.258 -> 1.259
LegalizeDAG.cpp updated: 1.423 -> 1.424
---
Log message:

Move something that should be in the dag combiner from the legalizer to the
dag combiner.


---
Diffs of the changes:  (+15 -17)

 DAGCombiner.cpp |   14 ++++++++++++++
 LegalizeDAG.cpp |   18 +-----------------
 2 files changed, 15 insertions(+), 17 deletions(-)


Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.258 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.259
--- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.258	Thu Dec  7 16:36:47 2006
+++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp	Sun Dec 10 20:23:46 2006
@@ -3034,6 +3034,20 @@
                         ST->getSrcValueOffset());
   }
   
+  // Turn 'store float 1.0, Ptr' -> 'store int 0x12345678, Ptr'
+  // FIXME: We shouldn't do this for TargetConstantFP's.
+  if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(Value)) {
+    SDOperand Tmp;
+    if (CFP->getValueType(0) == MVT::f32) {
+      Tmp = DAG.getConstant(FloatToBits(CFP->getValue()), MVT::i32);
+    } else {
+      assert(CFP->getValueType(0) == MVT::f64 && "Unknown FP type!");
+      Tmp = DAG.getConstant(DoubleToBits(CFP->getValue()), MVT::i64);
+    }
+    return DAG.getStore(Chain, Tmp, Ptr, ST->getSrcValue(),
+                        ST->getSrcValueOffset());
+  }
+
   if (CombinerAA) { 
     // Walk up chain skipping non-aliasing memory nodes.
     SDOperand BetterChain = FindBetterChain(N, Chain);


Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.423 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.424
--- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.423	Fri Dec  8 20:42:38 2006
+++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp	Sun Dec 10 20:23:46 2006
@@ -1643,21 +1643,6 @@
     Tmp2 = LegalizeOp(ST->getBasePtr());  // Legalize the pointer.
 
     if (!ST->isTruncatingStore()) {
-      // Turn 'store float 1.0, Ptr' -> 'store int 0x12345678, Ptr'
-      // FIXME: We shouldn't do this for TargetConstantFP's.
-      // FIXME: move this to the DAG Combiner!
-      if (ConstantFPSDNode *CFP =dyn_cast<ConstantFPSDNode>(ST->getValue())) {
-        if (CFP->getValueType(0) == MVT::f32) {
-          Tmp3 = DAG.getConstant(FloatToBits(CFP->getValue()), MVT::i32);
-        } else {
-          assert(CFP->getValueType(0) == MVT::f64 && "Unknown FP type!");
-          Tmp3 = DAG.getConstant(DoubleToBits(CFP->getValue()), MVT::i64);
-        }
-        Result = DAG.getStore(Tmp1, Tmp3, Tmp2, ST->getSrcValue(),
-                              ST->getSrcValueOffset());
-        break;
-      }
-
       switch (getTypeAction(ST->getStoredVT())) {
       case Legal: {
         Tmp3 = LegalizeOp(ST->getValue());
@@ -4825,6 +4810,7 @@
       ExpandOp(Node->getOperand(0), LL, LH);
       ExpandOp(Node->getOperand(1), RL, RH);
       unsigned SH = MVT::getSizeInBits(RH.getValueType())-1;
+      // FIXME: Move this to the dag combiner.
       // MULHS implicitly sign extends its inputs.  Check to see if ExpandOp
       // extended the sign bit of the low half through the upper half, and if so
       // emit a MULHS instead of the alternate sequence that is valid for any
@@ -4838,8 +4824,6 @@
           LH.getOpcode() == ISD::SRA && LH.getOperand(0) == LL &&
           LH.getOperand(1).getOpcode() == ISD::Constant &&
           cast<ConstantSDNode>(LH.getOperand(1))->getValue() == SH) {
-        // FIXME: Move this to the dag combiner.
-        
         // Low part:
         Lo = DAG.getNode(ISD::MUL, NVT, LL, RL);
         // High part: