[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp SelectionDAGISel.cpp TargetLowering.cpp
Evan Cheng
evan.cheng at apple.com
Fri Dec 8 18:42:53 PST 2006
Changes in directory llvm/lib/CodeGen/SelectionDAG:
LegalizeDAG.cpp updated: 1.422 -> 1.423
SelectionDAGISel.cpp updated: 1.325 -> 1.326
TargetLowering.cpp updated: 1.81 -> 1.82
---
Log message:
Preliminary soft float support.
---
Diffs of the changes: (+74 -19)
LegalizeDAG.cpp | 35 +++++++++++++++++++++++++++++++----
SelectionDAGISel.cpp | 15 ++++++++++++---
TargetLowering.cpp | 43 +++++++++++++++++++++++++++++++------------
3 files changed, 74 insertions(+), 19 deletions(-)
Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.422 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.423
--- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.422 Thu Dec 7 14:04:42 2006
+++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Fri Dec 8 20:42:38 2006
@@ -4351,9 +4351,8 @@
MVT::ValueType NVT = TLI.getTypeToTransformTo(VT);
SDNode *Node = Op.Val;
assert(getTypeAction(VT) == Expand && "Not an expanded type!");
- assert((MVT::isInteger(VT) || VT == MVT::Vector) &&
- "Cannot expand FP values!");
- assert(((MVT::isInteger(NVT) && NVT < VT) || VT == MVT::Vector) &&
+ assert(((MVT::isInteger(NVT) && NVT < VT) || MVT::isFloatingPoint(VT) ||
+ VT == MVT::Vector) &&
"Cannot expand to FP value or to larger int value!");
// See if we already expanded it.
@@ -4583,9 +4582,18 @@
Tmp = TLI.LowerOperation(DAG.getNode(ISD::BIT_CONVERT, VT, Tmp), DAG);
}
+ MVT::ValueType NVT = Node->getValueType(0);
+ // f32 / f64 must be expanded to i32 / i64.
+ if (NVT == MVT::f32 || NVT == MVT::f64) {
+ Lo = DAG.getNode(ISD::BIT_CONVERT, TLI.getTypeToTransformTo(NVT),
+ Node->getOperand(0));
+ Hi = DAG.getConstant(0, TLI.getTypeToTransformTo(NVT));
+ break;
+ }
+
// Turn this into a load/store pair by default.
if (Tmp.Val == 0)
- Tmp = ExpandBIT_CONVERT(Node->getValueType(0), Node->getOperand(0));
+ Tmp = ExpandBIT_CONVERT(NVT, Node->getOperand(0));
ExpandOp(Tmp, Lo, Hi);
break;
@@ -4858,6 +4866,25 @@
case ISD::UDIV: Lo = ExpandLibCall("__udivdi3", Node, Hi); break;
case ISD::SREM: Lo = ExpandLibCall("__moddi3" , Node, Hi); break;
case ISD::UREM: Lo = ExpandLibCall("__umoddi3", Node, Hi); break;
+
+ case ISD::FADD:
+ Lo = ExpandLibCall(((VT == MVT::f32) ? "__addsf3" : "__adddf3"), Node, Hi);
+ break;
+ case ISD::FSUB:
+ Lo = ExpandLibCall(((VT == MVT::f32) ? "__subsf3" : "__subdf3"), Node, Hi);
+ break;
+ case ISD::FMUL:
+ Lo = ExpandLibCall(((VT == MVT::f32) ? "__mulsf3" : "__muldf3"), Node, Hi);
+ break;
+ case ISD::FDIV:
+ Lo = ExpandLibCall(((VT == MVT::f32) ? "__divsf3" : "__divdf3"), Node, Hi);
+ break;
+ case ISD::FP_EXTEND:
+ Lo = ExpandLibCall("__extendsfdf2", Node, Hi);
+ break;
+ case ISD::FP_ROUND:
+ Lo = ExpandLibCall("__truncdfsf2", Node, Hi);
+ break;
}
// Make sure the resultant values have been legalized themselves, unless this
Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.325 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.326
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.325 Thu Dec 7 14:04:42 2006
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Fri Dec 8 20:42:38 2006
@@ -2954,7 +2954,10 @@
// integers it is.
MVT::ValueType NVT = getTypeToTransformTo(VT);
unsigned NumVals = MVT::getSizeInBits(VT)/MVT::getSizeInBits(NVT);
- if (NumVals == 2) {
+ if (NumVals == 1) {
+ SDOperand Tmp = SDOperand(Result, i++);
+ Ops.push_back(DAG.getNode(ISD::BIT_CONVERT, VT, Tmp));
+ } else if (NumVals == 2) {
SDOperand Lo = SDOperand(Result, i++);
SDOperand Hi = SDOperand(Result, i++);
@@ -3040,7 +3043,10 @@
// integers it is.
MVT::ValueType NVT = getTypeToTransformTo(VT);
unsigned NumVals = MVT::getSizeInBits(VT)/MVT::getSizeInBits(NVT);
- if (NumVals == 2) {
+ if (NumVals == 1) {
+ Ops.push_back(DAG.getNode(ISD::BIT_CONVERT, VT, Op));
+ Ops.push_back(DAG.getConstant(isSigned, MVT::i32));
+ } else if (NumVals == 2) {
SDOperand Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, NVT, Op,
DAG.getConstant(0, getPointerTy()));
SDOperand Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, NVT, Op,
@@ -3166,7 +3172,10 @@
ResVal = DAG.getNode(ISD::TRUNCATE, VT, ResVal);
} else {
assert(MVT::isFloatingPoint(VT));
- ResVal = DAG.getNode(ISD::FP_ROUND, VT, ResVal);
+ if (getTypeAction(VT) == Expand)
+ ResVal = DAG.getNode(ISD::BIT_CONVERT, VT, ResVal);
+ else
+ ResVal = DAG.getNode(ISD::FP_ROUND, VT, ResVal);
}
}
} else if (RetTys.size() == 3) {
Index: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:1.81 llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:1.82
--- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:1.81 Mon Nov 27 15:50:02 2006
+++ llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp Fri Dec 8 20:42:38 2006
@@ -86,10 +86,17 @@
assert(VT < PromoteTo && "Must promote to a larger type!");
TransformToType[VT] = PromoteTo;
} else if (Action == TargetLowering::Expand) {
- assert((VT == MVT::Vector || MVT::isInteger(VT)) && VT > MVT::i8 &&
- "Cannot expand this type: target must support SOME integer reg!");
- // Expand to the next smaller integer type!
- TransformToType[VT] = (MVT::ValueType)(VT-1);
+ // f32 and f64 is each expanded to corresponding integer type of same size.
+ if (VT == MVT::f32)
+ TransformToType[VT] = MVT::i32;
+ else if (VT == MVT::f64)
+ TransformToType[VT] = MVT::i64;
+ else {
+ assert((VT == MVT::Vector || MVT::isInteger(VT)) && VT > MVT::i8 &&
+ "Cannot expand this type: target must support SOME integer reg!");
+ // Expand to the next smaller integer type!
+ TransformToType[VT] = (MVT::ValueType)(VT-1);
+ }
}
}
@@ -129,12 +136,27 @@
else
TransformToType[(MVT::ValueType)IntReg] = (MVT::ValueType)IntReg;
- // If the target does not have native support for F32, promote it to F64.
- if (!isTypeLegal(MVT::f32))
- SetValueTypeAction(MVT::f32, Promote, *this,
- TransformToType, ValueTypeActions);
- else
+ // If the target does not have native F64 support, expand it to I64. We will
+ // be generating soft float library calls. If the target does not have native
+ // support for F32, promote it to F64 if it is legal. Otherwise, expand it to
+ // I32.
+ if (isTypeLegal(MVT::f64))
+ TransformToType[MVT::f64] = MVT::f64;
+ else {
+ NumElementsForVT[MVT::f64] = NumElementsForVT[MVT::i64];
+ SetValueTypeAction(MVT::f64, Expand, *this, TransformToType,
+ ValueTypeActions);
+ }
+ if (isTypeLegal(MVT::f32))
TransformToType[MVT::f32] = MVT::f32;
+ else if (isTypeLegal(MVT::f64))
+ SetValueTypeAction(MVT::f32, Promote, *this, TransformToType,
+ ValueTypeActions);
+ else {
+ NumElementsForVT[MVT::f32] = NumElementsForVT[MVT::i32];
+ SetValueTypeAction(MVT::f32, Expand, *this, TransformToType,
+ ValueTypeActions);
+ }
// Set MVT::Vector to always be Expanded
SetValueTypeAction(MVT::Vector, Expand, *this, TransformToType,
@@ -147,9 +169,6 @@
if (isTypeLegal((MVT::ValueType)i))
TransformToType[i] = (MVT::ValueType)i;
}
-
- assert(isTypeLegal(MVT::f64) && "Target does not support FP?");
- TransformToType[MVT::f64] = MVT::f64;
}
const char *TargetLowering::getTargetNodeName(unsigned Opcode) const {
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