[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp

[Chris Lattner]

Changes in directory llvm/lib/Target/PowerPC:

PPCISelLowering.cpp updated: 1.223 -> 1.224
---
Log message:

ppc64 doesn't have lwau, don't attempt to form it.


---
Diffs of the changes:  (+9 -3)

 PPCISelLowering.cpp |   12 +++++++++---
 1 files changed, 9 insertions(+), 3 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.223 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.224
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.223	Fri Nov 10 17:58:44 2006
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp	Fri Nov 10 18:08:42 2006
@@ -876,9 +876,6 @@
   SDOperand Ptr;
   if (LoadSDNode *LD = dyn_cast<LoadSDNode>(N)) {
     Ptr = LD->getBasePtr();
-    
-    // FIXME: PPC has no LWAU!
-    
   } else if (StoreSDNode *ST = dyn_cast<StoreSDNode>(N)) {
     ST = ST;
     //Ptr = ST->getBasePtr();
@@ -891,6 +888,15 @@
   // TODO: Handle reg+reg.
   if (!SelectAddressRegImm(Ptr, Offset, Base, DAG))
     return false;
+
+  // PPC64 doesn't have lwau, but it does have lwaux.  Reject preinc load of
+  // sext i32 to i64 when addr mode is r+i.
+  if (LoadSDNode *LD = dyn_cast<LoadSDNode>(N)) {
+    if (LD->getValueType(0) == MVT::i64 && LD->getLoadedVT() == MVT::i32 &&
+        LD->getExtensionType() == ISD::SEXTLOAD &&
+        isa<ConstantSDNode>(Offset))
+      return false;
+  }
   
   AM = ISD::PRE_INC;
   return true;