[llvm-commits] [SignlessTypes] CVS: llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp

Reid Spencer reid at x10sys.com
Wed Oct 18 20:58:57 PDT 2006



Changes in directory llvm/lib/Target/Alpha:

AlphaISelDAGToDAG.cpp updated: 1.58 -> 1.58.2.1
---
Log message:

For PR950: http://llvm.org/PR950 :
This commit (on SignlessTypes branch) provides the first Iteration for 
moving LLVM away from Signed types. This patch removes the ConstantSInt
and ConstantUInt classes from Type.h and makes all necessary changes in
LLVM to compensate.


---
Diffs of the changes:  (+1 -2)

 AlphaISelDAGToDAG.cpp |    3 +--
 1 files changed, 1 insertion(+), 2 deletions(-)


Index: llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
diff -u llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.58 llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.58.2.1
--- llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.58	Wed Oct 11 11:24:51 2006
+++ llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp	Wed Oct 18 22:57:56 2006
@@ -317,8 +317,7 @@
       break; //(zext (LDAH (LDA)))
     //Else use the constant pool
     MachineConstantPool *CP = BB->getParent()->getConstantPool();
-    ConstantUInt *C =
-      ConstantUInt::get(Type::getPrimitiveType(Type::ULongTyID) , uval);
+    ConstantInt *C = ConstantInt::get(Type::ULongTy, uval);
     SDOperand CPI = CurDAG->getTargetConstantPool(C, MVT::i64);
     SDNode *Tmp = CurDAG->getTargetNode(Alpha::LDAHr, MVT::i64, CPI,
                                         getGlobalBaseReg());






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