[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Chris Lattner sabre at nondot.org
Tue Oct 17 14:24:29 PDT 2006



Changes in directory llvm/lib/CodeGen/SelectionDAG:

DAGCombiner.cpp updated: 1.228 -> 1.229
---
Log message:

Fix CodeGen/PowerPC/2006-10-17-brcc-miscompile.ll


---
Diffs of the changes:  (+1 -1)

 DAGCombiner.cpp |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.228 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.229
--- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.228	Tue Oct 17 14:33:52 2006
+++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp	Tue Oct 17 16:24:15 2006
@@ -3689,7 +3689,7 @@
             cast<ConstantSDNode>(N0.getOperand(1))->getValue() == 1) {
           // If this is (X^1) == 0/1, swap the RHS and eliminate the xor.  We
           // can only do this if the top bits are known zero.
-          if (TLI.MaskedValueIsZero(N1, 
+          if (TLI.MaskedValueIsZero(N0, 
                                     MVT::getIntVTBitMask(N0.getValueType())-1)){
             // Okay, get the un-inverted input value.
             SDOperand Val;






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