[llvm-commits] CVS: llvm/include/llvm/CodeGen/SelectionDAG.h SelectionDAGNodes.h

[Evan Cheng]

Changes in directory llvm/include/llvm/CodeGen:

SelectionDAG.h updated: 1.138 -> 1.139
SelectionDAGNodes.h updated: 1.154 -> 1.155
---
Log message:

Split PRE_INDEXED to PRE_INC / PRE_DEC and similarly for POST_INDEXED.

---
Diffs of the changes:  (+14 -8)

 SelectionDAG.h      |    1 +
 SelectionDAGNodes.h |   21 +++++++++++++--------
 2 files changed, 14 insertions(+), 8 deletions(-)


Index: llvm/include/llvm/CodeGen/SelectionDAG.h
diff -u llvm/include/llvm/CodeGen/SelectionDAG.h:1.138 llvm/include/llvm/CodeGen/SelectionDAG.h:1.139
--- llvm/include/llvm/CodeGen/SelectionDAG.h:1.138	Mon Oct 16 15:52:31 2006
+++ llvm/include/llvm/CodeGen/SelectionDAG.h	Tue Oct 17 16:12:56 2006
@@ -314,6 +314,7 @@
   SDOperand getExtLoad(ISD::LoadExtType ExtType, MVT::ValueType VT,
                        SDOperand Chain, SDOperand Ptr, const Value *SV,
                        int SVOffset, MVT::ValueType EVT, bool isVolatile=false);
+  SDOperand getPreIndexedLoad(SDOperand OrigLoad, SDOperand Base);
   SDOperand getVecLoad(unsigned Count, MVT::ValueType VT, SDOperand Chain, 
                        SDOperand Ptr, SDOperand SV);
 


Index: llvm/include/llvm/CodeGen/SelectionDAGNodes.h
diff -u llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.154 llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.155
--- llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1.154	Fri Oct 13 16:08:54 2006
+++ llvm/include/llvm/CodeGen/SelectionDAGNodes.h	Tue Oct 17 16:12:56 2006
@@ -528,8 +528,8 @@
   ///              chain, an unindexed load produces one value (result of the
   ///              load); an unindexed store does not produces a value.
   ///
-  /// PRE_INDEXED  Similar to the unindexed mode where the effective address is
-  ///              the result of computation of the base pointer. However, it
+  /// PRE_INC      Similar to the unindexed mode where the effective address is
+  /// PRE_DEC      the result of computation of the base pointer. However, it
   ///              considers the computation as being folded into the load /
   ///              store operation (i.e. the load / store does the address
   ///              computation as well as performing the memory transaction).
@@ -539,8 +539,8 @@
   ///              computation); a pre-indexed store produces one value (result
   ///              of the address computation).
   ///
-  /// POST_INDEXED The effective address is the value of the base pointer. The
-  ///              value of the offset operand is then added to the base after
+  /// POST_INC     The effective address is the value of the base pointer. The
+  /// POST_DEC     value of the offset operand is then added to the base after
   ///              memory transaction. In addition to producing a chain,
   ///              post-indexed load produces two values (the result of the load
   ///              and the result of the base + offset computation); a
@@ -549,8 +549,10 @@
   ///
   enum MemOpAddrMode {
     UNINDEXED = 0,
-    PRE_INDEXED,
-    POST_INDEXED
+    PRE_INC,
+    PRE_DEC,
+    POST_INC,
+    POST_DEC
   };
 
   //===--------------------------------------------------------------------===//
@@ -854,6 +856,7 @@
   /// getOperationName - Return the opcode of this operation for printing.
   ///
   const char* getOperationName(const SelectionDAG *G = 0) const;
+  static const char* getAddressingModeName(ISD::MemOpAddrMode AM);
   void dump() const;
   void dump(const SelectionDAG *G) const;
 
@@ -1405,7 +1408,8 @@
     : SDNode(ISD::LOAD, Chain, Ptr, Off),
       AddrMode(AM), ExtType(ETy), LoadedVT(LVT), SrcValue(SV), SVOffset(O),
       Alignment(Align), IsVolatile(Vol) {
-    assert((Off.getOpcode() == ISD::UNDEF || AddrMode == ISD::POST_INDEXED) &&
+    assert((Off.getOpcode() == ISD::UNDEF ||
+            AddrMode == ISD::POST_INC || AddrMode == ISD::POST_DEC) &&
            "Only post-indexed load has a non-undef offset operand");
   }
 public:
@@ -1458,7 +1462,8 @@
     : SDNode(ISD::STORE, Chain, Value, Ptr, Off),
       AddrMode(AM), IsTruncStore(isTrunc), StoredVT(SVT), SrcValue(SV),
       SVOffset(O), Alignment(Align), IsVolatile(Vol) {
-    assert((Off.getOpcode() == ISD::UNDEF || AddrMode == ISD::POST_INDEXED) &&
+    assert((Off.getOpcode() == ISD::UNDEF ||
+            AddrMode == ISD::POST_INC || AddrMode == ISD::POST_DEC) &&
            "Only post-indexed store has a non-undef offset operand");
   }
 public: