[llvm-commits] CVS: llvm/lib/CodeGen/LiveVariables.cpp

[Bill Wendling]

Changes in directory llvm/lib/CodeGen:

LiveVariables.cpp updated: 1.59 -> 1.60
---
Log message:

Fix for PR929: http://llvm.org/PR929 . The PHI nodes were being gone through for each instruction
in a successor block for every block...resulting in some O(N^k) algorithm
which wasn't very good for performance. Calculating this information up
front and keeping it in a map made it much faster.


---
Diffs of the changes:  (+26 -21)

 LiveVariables.cpp |   47 ++++++++++++++++++++++++++---------------------
 1 files changed, 26 insertions(+), 21 deletions(-)


Index: llvm/lib/CodeGen/LiveVariables.cpp
diff -u llvm/lib/CodeGen/LiveVariables.cpp:1.59 llvm/lib/CodeGen/LiveVariables.cpp:1.60
--- llvm/lib/CodeGen/LiveVariables.cpp:1.59	Tue Sep  5 15:19:27 2006
+++ llvm/lib/CodeGen/LiveVariables.cpp	Tue Oct  3 02:20:20 2006
@@ -92,7 +92,6 @@
   return std::binary_search(I->second.begin(), I->second.end(), Reg);
 }
 
-
 void LiveVariables::MarkVirtRegAliveInBlock(VarInfo &VRInfo,
                                             MachineBasicBlock *MBB) {
   unsigned BBNum = MBB->getNumber();
@@ -212,6 +211,8 @@
     HandlePhysRegDef(I->first, 0);
   }
 
+  analyzePHINodes(MF);
+
   // Calculate live variable information in depth first order on the CFG of the
   // function.  This guarantees that we will see the definition of a virtual
   // register before its uses due to dominance properties of SSA (except for PHI
@@ -288,26 +289,16 @@
     // bottom of this basic block.  We check all of our successor blocks to see
     // if they have PHI nodes, and if so, we simulate an assignment at the end
     // of the current block.
-    for (MachineBasicBlock::succ_iterator SI = MBB->succ_begin(),
-           E = MBB->succ_end(); SI != E; ++SI) {
-      MachineBasicBlock *Succ = *SI;
-
-      // PHI nodes are guaranteed to be at the top of the block...
-      for (MachineBasicBlock::iterator MI = Succ->begin(), ME = Succ->end();
-           MI != ME && MI->getOpcode() == TargetInstrInfo::PHI; ++MI) {
-        for (unsigned i = 1; ; i += 2) {
-          assert(MI->getNumOperands() > i+1 &&
-                 "Didn't find an entry for our predecessor??");
-          if (MI->getOperand(i+1).getMachineBasicBlock() == MBB) {
-            MachineOperand &MO = MI->getOperand(i);
-            VarInfo &VRInfo = getVarInfo(MO.getReg());
-            assert(VRInfo.DefInst && "Register use before def (or no def)!");
+    if (!PHIVarInfo[MBB].empty()) {
+      std::vector<unsigned>& VarInfoVec = PHIVarInfo[MBB];
 
-            // Only mark it alive only in the block we are representing.
-            MarkVirtRegAliveInBlock(VRInfo, MBB);
-            break;   // Found the PHI entry for this block.
-          }
-        }
+      for (std::vector<unsigned>::iterator I = VarInfoVec.begin(),
+             E = VarInfoVec.end(); I != E; ++I) {
+        VarInfo& VRInfo = getVarInfo(*I);
+        assert(VRInfo.DefInst && "Register use before def (or no def)!");
+
+        // Only mark it alive only in the block we are representing.
+        MarkVirtRegAliveInBlock(VRInfo, MBB);
       }
     }
 
@@ -362,6 +353,7 @@
     assert(Visited.count(&*i) != 0 && "unreachable basic block found");
 #endif
 
+  PHIVarInfo.clear();
   return false;
 }
 
@@ -450,4 +442,17 @@
   RegistersDead.erase(I);
 }
 
-
+/// analyzePHINodes - Gather information about the PHI nodes in here. In
+/// particular, we want to map the variable information of a virtual
+/// register which is used in a PHI node. We map that to the BB the vreg is
+/// coming from.
+///
+void LiveVariables::analyzePHINodes(const MachineFunction& Fn) {
+  for (MachineFunction::const_iterator I = Fn.begin(), E = Fn.end();
+       I != E; ++I)
+    for (MachineBasicBlock::const_iterator BBI = I->begin(), BBE = I->end();
+         BBI != BBE && BBI->getOpcode() == TargetInstrInfo::PHI; ++BBI)
+      for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2)
+        PHIVarInfo[BBI->getOperand(i + 1).getMachineBasicBlock()].
+          push_back(BBI->getOperand(i).getReg());
+}