[llvm-commits] CVS: llvm/lib/Target/X86/X86RegisterInfo.cpp X86RegisterInfo.td

[Chris Lattner]

Changes in directory llvm/lib/Target/X86:

X86RegisterInfo.cpp updated: 1.162 -> 1.163
X86RegisterInfo.td updated: 1.37 -> 1.38
---
Log message:

Constify some methods.  Patch provided by Anton Vayvod, thanks!


---
Diffs of the changes:  (+7 -7)

 X86RegisterInfo.cpp |    2 +-
 X86RegisterInfo.td  |   12 ++++++------
 2 files changed, 7 insertions(+), 7 deletions(-)


Index: llvm/lib/Target/X86/X86RegisterInfo.cpp
diff -u llvm/lib/Target/X86/X86RegisterInfo.cpp:1.162 llvm/lib/Target/X86/X86RegisterInfo.cpp:1.163
--- llvm/lib/Target/X86/X86RegisterInfo.cpp:1.162	Thu Jul 20 17:52:28 2006
+++ llvm/lib/Target/X86/X86RegisterInfo.cpp	Thu Aug 17 17:00:08 2006
@@ -737,7 +737,7 @@
 // pointer register.  This is true if the function has variable sized allocas or
 // if frame pointer elimination is disabled.
 //
-static bool hasFP(MachineFunction &MF) {
+static bool hasFP(const MachineFunction &MF) {
   return (NoFramePointerElim || 
           MF.getFrameInfo()->hasVarSizedObjects() ||
           MF.getInfo<X86FunctionInfo>()->getForceFramePointer());


Index: llvm/lib/Target/X86/X86RegisterInfo.td
diff -u llvm/lib/Target/X86/X86RegisterInfo.td:1.37 llvm/lib/Target/X86/X86RegisterInfo.td:1.38
--- llvm/lib/Target/X86/X86RegisterInfo.td:1.37	Mon Aug  7 16:02:39 2006
+++ llvm/lib/Target/X86/X86RegisterInfo.td	Thu Aug 17 17:00:08 2006
@@ -107,11 +107,11 @@
 
 def GR16 : RegisterClass<"X86", [i16], 16, [AX, CX, DX, SI, DI, BX, BP, SP]> {
   let MethodProtos = [{
-    iterator allocation_order_end(MachineFunction &MF) const;
+    iterator allocation_order_end(const MachineFunction &MF) const;
   }];
   let MethodBodies = [{
     GR16Class::iterator
-    GR16Class::allocation_order_end(MachineFunction &MF) const {
+    GR16Class::allocation_order_end(const MachineFunction &MF) const {
       if (hasFP(MF))     // Does the function dedicate EBP to being a frame ptr?
         return end()-2;  // If so, don't allocate SP or BP
       else
@@ -123,11 +123,11 @@
 def GR32 : RegisterClass<"X86", [i32], 32, 
                          [EAX, ECX, EDX, ESI, EDI, EBX, EBP, ESP]> {
   let MethodProtos = [{
-    iterator allocation_order_end(MachineFunction &MF) const;
+    iterator allocation_order_end(const MachineFunction &MF) const;
   }];
   let MethodBodies = [{
     GR32Class::iterator
-    GR32Class::allocation_order_end(MachineFunction &MF) const {
+    GR32Class::allocation_order_end(const MachineFunction &MF) const {
       if (hasFP(MF))     // Does the function dedicate EBP to being a frame ptr?
         return end()-2;  // If so, don't allocate ESP or EBP
       else
@@ -160,11 +160,11 @@
 def RST : RegisterClass<"X86", [f64], 32,
                         [ST0, ST1, ST2, ST3, ST4, ST5, ST6, ST7]> {
     let MethodProtos = [{
-    iterator allocation_order_end(MachineFunction &MF) const;
+    iterator allocation_order_end(const MachineFunction &MF) const;
   }];
   let MethodBodies = [{
     RSTClass::iterator
-    RSTClass::allocation_order_end(MachineFunction &MF) const {
+    RSTClass::allocation_order_end(const MachineFunction &MF) const {
       return begin();
     }
   }];