[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

[Chris Lattner]

Changes in directory llvm/lib/CodeGen/SelectionDAG:

SelectionDAGISel.cpp updated: 1.254 -> 1.255
---
Log message:

Fix X86/inline-asm.ll:test2, a case where an input value was implicitly
truncated.


---
Diffs of the changes:  (+6 -3)

 SelectionDAGISel.cpp |    9 ++++++---
 1 files changed, 6 insertions(+), 3 deletions(-)


Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.254 llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.255
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.254	Thu Jun  8 13:22:48 2006
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp	Thu Jun  8 13:27:11 2006
@@ -1804,9 +1804,12 @@
     // If there is a single register and the types differ, this must be
     // a promotion.
     if (RegVT != ValueVT) {
-      if (MVT::isInteger(RegVT))
-        Val = DAG.getNode(ISD::ANY_EXTEND, RegVT, Val);
-      else
+      if (MVT::isInteger(RegVT)) {
+        if (RegVT < ValueVT)
+          Val = DAG.getNode(ISD::TRUNCATE, RegVT, Val);
+        else
+          Val = DAG.getNode(ISD::ANY_EXTEND, RegVT, Val);
+      } else
         Val = DAG.getNode(ISD::FP_EXTEND, RegVT, Val);
     }
     Chain = DAG.getCopyToReg(Chain, Regs[0], Val, Flag);