[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp

[Chris Lattner]

Changes in directory llvm/lib/CodeGen/SelectionDAG:

ScheduleDAG.cpp updated: 1.83 -> 1.84
---
Log message:

Remove a bunch more SparcV9 specific stuff


---
Diffs of the changes:  (+5 -5)

 ScheduleDAG.cpp |   10 +++++-----
 1 files changed, 5 insertions(+), 5 deletions(-)


Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.83 llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.84
--- llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.83	Tue May  2 20:29:56 2006
+++ llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp	Wed May  3 20:15:02 2006
@@ -110,7 +110,7 @@
     MI->addRegOperand(R->getReg(), MachineOperand::Use);
   } else if (GlobalAddressSDNode *TGA =
              dyn_cast<GlobalAddressSDNode>(Op)) {
-    MI->addGlobalAddressOperand(TGA->getGlobal(), false, TGA->getOffset());
+    MI->addGlobalAddressOperand(TGA->getGlobal(), TGA->getOffset());
   } else if (BasicBlockSDNode *BB =
              dyn_cast<BasicBlockSDNode>(Op)) {
     MI->addMachineBasicBlockOperand(BB->getBasicBlock());
@@ -143,7 +143,7 @@
     MI->addConstantPoolIndexOperand(Idx, Offset);
   } else if (ExternalSymbolSDNode *ES = 
              dyn_cast<ExternalSymbolSDNode>(Op)) {
-    MI->addExternalSymbolOperand(ES->getSymbol(), false);
+    MI->addExternalSymbolOperand(ES->getSymbol());
   } else {
     assert(Op.getValueType() != MVT::Other &&
            Op.getValueType() != MVT::Flag &&
@@ -296,7 +296,7 @@
       // Add the asm string as an external symbol operand.
       const char *AsmStr =
         cast<ExternalSymbolSDNode>(Node->getOperand(1))->getSymbol();
-      MI->addExternalSymbolOperand(AsmStr, false);
+      MI->addExternalSymbolOperand(AsmStr);
       
       // Add all of the operand registers to the instruction.
       for (unsigned i = 2; i != NumOps;) {
@@ -311,13 +311,13 @@
         case 1:  // Use of register.
           for (; NumVals; --NumVals, ++i) {
             unsigned Reg = cast<RegisterSDNode>(Node->getOperand(i))->getReg();
-            MI->addMachineRegOperand(Reg, MachineOperand::Use);
+            MI->addRegOperand(Reg, MachineOperand::Use);
           }
           break;
         case 2:   // Def of register.
           for (; NumVals; --NumVals, ++i) {
             unsigned Reg = cast<RegisterSDNode>(Node->getOperand(i))->getReg();
-            MI->addMachineRegOperand(Reg, MachineOperand::Def);
+            MI->addRegOperand(Reg, MachineOperand::Def);
           }
           break;
         case 3: { // Immediate.