[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp

Chris Lattner lattner at cs.uiuc.edu
Mon Apr 10 18:21:56 PDT 2006



Changes in directory llvm/lib/Target/PowerPC:

PPCISelLowering.cpp updated: 1.142 -> 1.143
---
Log message:

Move some return-handling code from lowerarguments to the ISD::RET handling stuff.
No functionality change.


---
Diffs of the changes:  (+9 -20)

 PPCISelLowering.cpp |   29 +++++++++--------------------
 1 files changed, 9 insertions(+), 20 deletions(-)


Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.142 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.143
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.142	Sat Apr  8 17:59:15 2006
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp	Mon Apr 10 20:21:43 2006
@@ -880,12 +880,21 @@
       unsigned ArgReg = MVT::isInteger(ArgVT) ? PPC::R3 : PPC::F1;
       Copy = DAG.getCopyToReg(Op.getOperand(0), ArgReg, Op.getOperand(1),
                               SDOperand());
+      
+      // If we haven't noted the R3/F1 are live out, do so now.
+      if (DAG.getMachineFunction().liveout_empty())
+        DAG.getMachineFunction().addLiveOut(ArgReg);
       break;
     }
     case 3:
       Copy = DAG.getCopyToReg(Op.getOperand(0), PPC::R3, Op.getOperand(2), 
                               SDOperand());
       Copy = DAG.getCopyToReg(Copy, PPC::R4, Op.getOperand(1),Copy.getValue(1));
+      // If we haven't noted the R3+R4 are live out, do so now.
+      if (DAG.getMachineFunction().liveout_empty()) {
+        DAG.getMachineFunction().addLiveOut(PPC::R3);
+        DAG.getMachineFunction().addLiveOut(PPC::R4);
+      }
       break;
     }
     return DAG.getNode(PPCISD::RET_FLAG, MVT::Other, Copy, Copy.getValue(1));
@@ -1249,26 +1258,6 @@
     }
   }
   
-  // Finally, inform the code generator which regs we return values in.
-  switch (getValueType(F.getReturnType())) {
-    default: assert(0 && "Unknown type!");
-    case MVT::isVoid: break;
-    case MVT::i1:
-    case MVT::i8:
-    case MVT::i16:
-    case MVT::i32:
-      MF.addLiveOut(PPC::R3);
-      break;
-    case MVT::i64:
-      MF.addLiveOut(PPC::R3);
-      MF.addLiveOut(PPC::R4);
-      break;
-    case MVT::f32:
-    case MVT::f64:
-      MF.addLiveOut(PPC::F1);
-      break;
-  }
-  
   return ArgValues;
 }
 






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